Find information on common issues.
Ask questions and find answers from other users.
Suggest a new site feature or improvement.
Check on status of your tickets.
The metal–oxide–semiconductor field-effect transistor is a device used for amplifying or switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a conducting channel between the two other contacts called source and drain. The channel can be of n-typeor p-type, and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS). It is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common. More information on MOSFET can be found here.
Simulation of highly idealized, atomic scale MQCA logic circuits
0.0 out of 5 stars
15 Nov 2007 | Papers | Contributor(s): Dmitri Nikonov, George Bourianoff
Spintronics logic devices based on majority gates formed by atomic-level arrangements of spins in the crystal lattice is considered. The dynamics of switching is modeled by time-dependent solution...
Electronics From the Bottom Up: top-down/bottom-up views of length
17 Aug 2007 | Online Presentations | Contributor(s): Muhammad A. Alam
When devices get small stochastic effects become important. Random
dopant effects lead to uncertainties in a MOSFET’s threshold voltage
and gate oxides breakdown is a random process. ...
4.5 out of 5 stars
24 Jul 2007 | Tools | Contributor(s): Steven Clark
Introduction to nanoMOS
02 Jul 2007 | Series | Contributor(s): James K Fodor, Jing Guo
This learning module introduces nanoHUB users to the nanoMOS simulator. A brief introduction to nanoMOS is presented, followed by voiced presentations featuring the simulator in action. Upon...
PETE : Purdue Emerging Technology Evaluator
5.0 out of 5 stars
27 Jun 2007 | Tools | Contributor(s): Arijit Raychowdhury, Charles Augustine, Yunfei Gao, Mark Lundstrom, Kaushik Roy
Estimate circuit level performance and power of novel devices
CMOS-Nano Hybrid Technology: a nanoFPGA-related study
04 Apr 2007 | Online Presentations | Contributor(s): Wei Wang
Dr. Wei Wang received his PhD degree in 2002 from Concordia University, Montreal, QC, Canada, in Electrical and Computer Engineering. From 2002 to 2004, he was an assistant professor in the...
MSE 376 Lecture 13: Nanoscale CMOS, part 2
31 Mar 2007 | Online Presentations | Contributor(s): Mark Hersam
MSE 376 Lecture 12: Nanoscale CMOS, part 1
Illinois Tools: MOCA
4.0 out of 5 stars
28 Mar 2007 | Tools | Contributor(s): Mohamed Mohamed, Umberto Ravaioli, Nahil Sobh, derrick kearney
A 2D Full-band Monte Carlo (MOCA) Simulation of SOI Device Structures
MOSCNT: code for carbon nanotube transistor simulation
3.5 out of 5 stars
15 Nov 2006 | Downloads | Contributor(s): Siyu Koswatta, Jing Guo, Dmitri Nikonov
Ballistic transport in carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) is simulated using the Non-equilibrium Green’s function formalism. A cylindrical...
Nanoscale MOSFETs: Physics, Simulation and Design
26 Oct 2006 | Papers | Contributor(s): Zhibin Ren
This thesis discusses device physics, modeling and design issues of nanoscale
transistors at the quantum level. The principle topics addressed in this report are 1) an
nanoMOS 2.0: A Two -Dimensional Simulator for Quantum Transport in Double-Gate MOSFETs
06 Oct 2006 | Papers | Contributor(s): Zhibin Ren, Ramesh Venugopal, Sebastien Goasguen, Supriyo Datta, Mark Lundstrom
A program to numerically simulate quantum transport in double gate MOSFETs is
described. The program uses a Green’s function approach and a simple treatment of
scattering based on the idea...
Modeling Interface-defect Generation (MIG)
28 Aug 2006 | Tools | Contributor(s): Ahmad Ehteshamul Islam, Haldun Kufluoglu, Muhammad A. Alam
Analyzes device reliability based on NBTI
30 Mar 2006 | Tools | Contributor(s): Shaikh S. Ahmed, Saumitra Raj Mehrotra, SungGeun Kim, Matteo Mannino, Gerhard Klimeck, Dragica Vasileska, Xufeng Wang, Himadri Pal, Gloria Wahyu Budiman
Simulates the current-voltage characteristics for bulk, SOI, and double-gate Field Effect Transistors (FETs)
Saumitra Raj Mehrotra
Fabrication of a MOSFET within a Microprocessor
16 Nov 2005 | Animations | Contributor(s): John C. Bean
This resource depicts the step-by-step process by which the transistors of an integrated circuit are made.
FETToy 2.0 Source Code Download
27 Oct 2005 | Downloads
FETToy 2.0 is a set of Matlab scripts that calculate the ballistic I-V characteristics for a conventional MOSFETs, Nanowire MOSFETs and Carbon NanoTube MOSFETs. For conventional MOSFETs, FETToy...
Faster Materials versus Nanoscaled Si and SiGe: A Fork in the Roadmap?
22 Jul 2004 | Online Presentations | Contributor(s): Jerry M. Woodall
Strained Si and SiGe MOSFET technologies face fundamental limits towards the end of this decade when the technology roadmap calls for gate dimensions of 45 nm headed for 22 nm. This fact, and...
Nanoelectronics and the Future of Microelectronics
12 Apr 2004 | Online Presentations | Contributor(s): Mark Lundstrom
Progress in silicon technology continues to outpace the historic pace of Moore's Law, but the end of device scaling now seems to be only 10-15 years away. As a result, there is intense interest in...