Tags: MOSFET modeling

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  1. Need to hire a nanohub freelancer to model a graphene OFET, vertical transistor -- fees MOSFET

    Closed | Responses: 0

    I need to hire a freelancer to model and predict a FET.

    I am not familiar with FETTOY.

    You will use a program like FETTOY to help us optimize the design of a FET...

    http://nanohub.org/answers/question/2033

  2. Nikolaos Makris

    http://nanohub.org/members/160697

  3. A Verilog-A Compact Model for Negative Capacitance FET

    28 Nov 2015 | Compact Models | Contributor(s):

    By Muhammad Abdul Wahab1, Muhammad A. Alam1

    Purdue University

    The NC-FET compact model is a semi-physical verilog-A model of the negative capacitance transistor. We developed this self-consistent model with BSIM4/MVS and Landau theory. This model is useful to...

    http://nanohub.org/publications/95/?v=1

  4. Gaurav Dhiman

    http://nanohub.org/members/131673

  5. how to simulate insulator in a GNRFET with matlab?

    Closed | Responses: 0

    I want to apply gate voltage on a graphene nanoribbon as a channel in a GNRFET. then I want to solve poisson equation but I need to know the voltage on channel as the boundary...

    http://nanohub.org/answers/question/1583

  6. Stanford Virtual-Source Carbon Nanotube Field-Effect Transistors Model

    08 Apr 2015 | Compact Models | Contributor(s):

    By Chi-Shuen Lee1, H.-S. Philip Wong1

    Stanford University

    The VSCNFET model captures the dimensional scaling properties and includes parasitic resistance, capacitance, and tunneling leakage currents. The model aims for CNFET technology assessment for the...

    http://nanohub.org/publications/42/?v=2

  7. Neel Chatterjee

    http://nanohub.org/members/118363

  8. Hybrid CMOS/SET models for PSpice?

    Closed | Responses: 0

    Hello! Can anyone tell me where can I find models for hybrid transistors (CMOS and Sinlgle Electron) for designing circuits in PSpice? I must find them for my homework. Thank you!

    http://nanohub.org/answers/question/1404

  9. How exactly PN junction works?

    Closed | Responses: 0

    I know the conventional explanation that electrons moves from n- side and holes from p-side etc but i know that holes is nothing but the absence of electron. So i want to know the working of P-N...

    http://nanohub.org/answers/question/1341

  10. Sabbir Ebna Razzaque

    http://nanohub.org/members/67938

  11. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to thinner SiON...

  12. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Fast and Ultra-fast Characterization Methods (Part 1 of 3)

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

  13. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Predictive Modeling (Part 3 of 3)

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to thinner SiON...

  14. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: The Impact of Gate Insulator Processes (Part 2 of 3)

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

    This presentation is part 2 on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to thinner...

  15. Bhupesh Bishnoi

    http://nanohub.org/members/62512

  16. Hasan Munir Nayfeh

    Dr. Hasan M. Nayfeh is a senior engineer at IBM SRDC (East Fishkill, New York). He received his Ph.D. (2003) in Electrical Engineering in the area of strained silicon devices from MIT (Cambridge,...

    http://nanohub.org/members/56927

  17. Keerti Kumar Korlapati

    http://nanohub.org/members/55518

  18. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling (2011)

    11 May 2011 | | Contributor(s):: Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability, or in short NBTI, observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to...

  19. Onkar Shrinivas Bhende

    http://nanohub.org/members/52322

  20. MOSFET Lab - Scaling

    03 Jan 2011 | | Contributor(s):: Saumitra Raj Mehrotra, Gerhard Klimeck, Dragica Vasileska

    The concept of device scaling and the need to control short channel effects is used in this real life problem