Support

Support Options

Submit a Support Ticket

 

Tags: MOSFET modeling

All Categories (1-20 of 29)

  1. Hybrid CMOS/SET models for PSpice?

    Closed | Responses: 0

    Hello! Can anyone tell me where can I find models for hybrid transistors (CMOS and Sinlgle Electron) for designing circuits in PSpice? I must find them for my homework. Thank you!

    http://nanohub.org/answers/question/1404

  2. How exactly PN junction works?

    Closed | Responses: 0

    I know the conventional explanation that electrons moves from n- side and holes from p-side etc but i know that holes is nothing but the absence of electron. So i want to know the working of...

    http://nanohub.org/answers/question/1341

  3. Sabbir Ebna Razzaque

    http://nanohub.org/members/67938

  4. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling

    28 Mar 2012 | Courses | Contributor(s): Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has...

    http://nanohub.org/resources/13613

  5. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Fast and Ultra-fast Characterization Methods (Part 1 of 3)

    28 Mar 2012 | Online Presentations | Contributor(s): Souvik Mahapatra

    http://nanohub.org/resources/13614

  6. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Predictive Modeling (Part 3 of 3)

    28 Mar 2012 | Online Presentations | Contributor(s): Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has...

    http://nanohub.org/resources/13612

  7. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: The Impact of Gate Insulator Processes (Part 2 of 3)

    28 Mar 2012 | Online Presentations | Contributor(s): Souvik Mahapatra

    This presentation is part 2 on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it...

    http://nanohub.org/resources/13611

  8. Hasan Munir Nayfeh

    Dr. Hasan M. Nayfeh is a senior engineer at IBM SRDC (East Fishkill, New York). He received his Ph.D. (2003) in Electrical Engineering in the area of strained silicon devices from MIT (Cambridge,...

    http://nanohub.org/members/56927

  9. keerti kumar korlapati

    http://nanohub.org/members/55518

  10. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling (2011)

    11 May 2011 | Online Presentations | Contributor(s): Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability, or in short NBTI, observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10...

    http://nanohub.org/resources/11249

  11. Onkar Shrinivas Bhende

    http://nanohub.org/members/52322

  12. MOSFET Lab - Scaling

    03 Jan 2011 | Teaching Materials | Contributor(s): Saumitra Raj Mehrotra, Gerhard Klimeck, Dragica Vasileska

    The concept of device scaling and the need to control short channel effects is used in this real life problem

    http://nanohub.org/resources/10268

  13. ABACUS: MOSFET - Diffusion Process

    09 Aug 2010 | Teaching Materials | Contributor(s): Dragica Vasileska, Gerhard Klimeck

    The goal of this assignment is to make familiar the students the required doses in the diffusion step of fabrication of semiconductor devices to get certain values of the volume doping densities.

    http://nanohub.org/resources/9484

  14. Threshold voltage in a nanowire MOSFET

    22 Apr 2010 | Animations | Contributor(s): Saumitra Raj Mehrotra, SungGeun Kim, Gerhard Klimeck

    Threshold voltage in a metal oxide semiconductor field-effect transistor (better known as a MOSFET) is usually defined as the gate voltage at which an inversion layer forms at the interface...

    http://nanohub.org/resources/8803

  15. i need detail about nanoscale double gate cmos mosfet

    Closed | Responses: 1

    to model a cmos double gate mosfet, what are the parameters need to be considered

    http://nanohub.org/answers/question/478

  16. How to modify Datta’s 1D Matrix Density Matlab code to simulate a germanium pMOS

    Closed | Responses: 0

    How would one modify Datta’s 1D Matrix Density Matlab code (shown in Quantum transport:Atom to Transistor) in order to simulate a germanium pMOS (the code shown simulates a static 1D Si...

    http://nanohub.org/answers/question/380

  17. Exercise for MOSFET Lab: DIBL Effect

    03 Aug 2009 | Teaching Materials | Contributor(s): Dragica Vasileska, Gerhard Klimeck

    In this exercise students are required to examine the drain induced barrier lowering (DIBL) effect in short channel MOSFET devices.

    http://nanohub.org/resources/7190

  18. Exercise for MOSFET Lab: Long Channel vs. Short Channel Device

    03 Aug 2009 | Teaching Materials | Contributor(s): Dragica Vasileska

    In this exercise studentsare required to simulate long channel device for which the graduate channel approximation is valid and the short channel device for which velocity saturation effect starts...

    http://nanohub.org/resources/7188

  19. Srinivasa Murali Dunga

    http://nanohub.org/members/22807

nanoHUB.org, a resource for nanoscience and nanotechnology, is supported by the National Science Foundation and other funding agencies. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.