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Progress in technology has brought microelectronics to the nanoscale, but nanoelectronics is not yet a well-defined engineering discipline with a coherent, experimentally verified, theoretical framework. The NCN has a vision for a new, 'bottom-up' approach to electronics, which involves: understanding electronic conduction at the atomistic level; formulating new simulation techniques; developing a new generation of software tools; and bringing this new understanding and perspective into the classroom. We address problems in atomistic phenomena, quantum transport, percolative transport in inhomogeneous media, reliability, and the connection of nanoelectronics to new problems such as biology, medicine, and energy. We work closely with experimentalists to understand nanoscale phenomena and to explore new device concepts. In the course of this work, we produce open source software tools and educational resources that we share with the community through the nanoHUB.
This page is a starting point for nanoHUB users interested in nanoelectronics. It lists key resources developed by the NCN Nanoelectronics team. The nanoHUB contains many more resources for nanoelectronics, and they can be located with the nanoHUB search function. To find all nanoelectronics resources, search for 'nanoelectronics.' To find those contributed by the NCN nanoelectronics team, search for 'NCNnanoelectronics.'
More information on Nanoelectronics can be found here.
From Single-Stage to Device-Level Simulation of Coupled Electron and Phonon Transport in Quantum Cascade Lasers
02 Nov 2015 | | Contributor(s):: Irena Knezevic
IWCE 2015 presentation. Abstract and more information to be added at a later date.
Multi-Scale Quantum Simulations of Conductive Bridging RAM
02 Nov 2015 | | Contributor(s):: Michael Povolotskyi, nicolas onofrio, David M Guzman, Alejandro Strachan, Gerhard Klimeck
IWCE 2015 presentation.
Green Light on Germanium
02 Nov 2015 | | Contributor(s):: peide ye
This talk will review recent progress as well as challenges on Ge research for future logic applications with emphasis on the breakthrough work at Purdue University on Ge nFET which leads to the demonstration of the world first Ge CMOS circuits on Si substrates. Ge device technology includes...
Inter-band Tunnel Transistors: Opportunities and Challenges
30 Oct 2015 | | Contributor(s):: Suman Datta
In this talk, we will review progress in Tunnel FETs and also analyze primary roadblocks in the path towards achieving steep switching performance in III-V HTFET.
Negative Capacitance Ferroelectric Transistors: A Promising Steep Slope Device Candidate?
In this talk, we will review progress in non-perovskite ALD based ferroelectric dielectrics which have strong implication for VLSI compatible negative capacitance Ferroelectric FETs.
Lorentzian fitting tool for phonon spectral energy density and general use
20 Oct 2015 | | Contributor(s):: Tianli Feng, Xiulin Ruan
Fit a general data set (or specially the phonon spectral energy density) as a Lorentzian function to obtain the peak position (or phonon frequency) and full width at half maximum (or relaxation time).
Dissipative Quantum Transport Using One-Particle Time-Dependent (Conditional) Wave Functions
16 Oct 2015 | | Contributor(s):: Xavier Oriols
IWCE 2015 presentation. an effective single-particle schrodinger equation to include dissipation into quantum devices is presented. this effective equation is fully understood in the context of bohmian mechanics, a theory of particles and waves, where it is possible to define unambiguously...
Spin Lifetime Dependence on Valley Splitting in Thin Silicon Films
30 Sep 2015 | | Contributor(s):: Joydeep Ghosh, Dmitri Osintsev, Viktor Sverdlov, S. Selberherr
IWCE 2015 presentation. the electron spin properties are promising for future spin-driven devices. in contrast to charge, spin is not a conserved quantity, and having sufficiently long spin lifetime is critical for applications. silicon, the major material of microelectronics, also appears...
NEMO5: Why must we treat topological insulator nanowires atomically?
13 Oct 2015 | | Contributor(s):: Fan Chen, Michael J. Manfra, Gerhard Klimeck, Tillmann Christoph Kubis
Effect of the High-k Dielectric/Semiconductor Interface on Electronic Properties in Ultra-thin Channels
30 Sep 2015 | | Contributor(s):: Daniel A. Valencia-Hoyos, Evan Michael Wilson, mark rodwell, Gerhard Klimeck, Michael Povolotskyi
IWCE 2015 presentation. Abstract and more information to be added at a later date. As logic devices continue to downscale, an increasing fraction of the channel atoms are in close contact with oxide atoms of the gate. These surface atoms experience a chemical environment that is distinct...
Self-Consistent Physical Modeling of SiOx-Based Memristor Structures
30 Sep 2015 | | Contributor(s):: Vihar Georgiev, Toufik Sadi, Asen Asenov
IWCE 2015 presentation We employ a newly-developed three- dimensional (3D) physical simulator to study Si resistive switching nonvolatile memory (RRAM) structures. We couple a stochastic simulation of ion transport to the ‘atomistic’ simulator GARAND and a self-heating model to...
Design and simulation of GaSb/InAs 2D Transmission enhanced TFET
30 Sep 2015 | | Contributor(s):: Pengyu Long, Evan Michael Wilson, Jun Huang, mark rodwell, Gerhard Klimeck, Michael Povolotskyi
Density Functional Tight Binding (DFTB) Modeling in the Context of Ultra-Thin Silicon-on-Insulator MOSFETs
07 Oct 2015 | | Contributor(s):: Stanislav Markov
IWCE 2015 presentation. We investigate the applicability of density functional tight binding (DFTB) theory , coupled to non-equilibrium Green functions (NEGF), for atomistic simulations of ultra-scaled electron devices, using the DFTB+ code . In the context of ultra-thin...
Device Options and Trade-offs for 5 nm CMOS Technology Seminar Series
30 Sep 2015 | | Contributor(s):: Mark Lundstrom
Today's CMOS technology is so-called 14-nm technology. 10 nm technology development is well underway, and 7 nm has begun. It will soon be time to select a technology for the 5 nm node. To help understand the device options, what each on promises, what the challenges and trade-offs are,...
Nanometer-Scale III-V Electronics: from Quantum-Well Planar MOSFETs to Vertical Nanowire MOSFETs
30 Sep 2015 | | Contributor(s):: Juses A. del Alamo
This talk will review recent progress as well as challenges confronting III-V electronics for future logic applications with emphasis on the presenter’s research activities at MIT.
The Deployment and Evolution of the First NEEDS- Certified Model — MIT Virtual Source Compact Model for Silicon Nanotransistors
03 Sep 2015 | | Contributor(s):: Shaloo Rakheja
In my talk, I will walk you through the fundamental steps involved in developing compact models, using the MVS model as an example. From the “lessons learned” in the process of MVS release in 2013 and its subsequent updates, I will provide a checklist of good practices to adopt while...
Non-Equilibrium Green's Function (NEGF): A Different Perspective
17 Sep 2015 | | Contributor(s):: Supriyo Datta
The NEGF method was established in the 1960’s through the classic work of Keldysh and others  using the methods of many- body perturbation theory (MBPT) and this approach is widely used in the literature . By contrast I have introduced a different approach starting with the...
Short-Wavelength Spin-Wave Generation by a Microstrip Line
11 Sep 2015 | | Contributor(s):: Adam Papp, Wolfgang Porod
IWCE 2015 presentation. We investigate the use of microstrip lines for short-wavelength spin-wave generation in magnetic thin films. We use micromagnetic and electromagnetic simulations to estimate the generated wave amplitudes for different geometries and at different frequencies. Our...
Self-Consistent Field and Master Equation Approach to Calculating the Dielectric Function of Graphene
14 Sep 2015 | | Contributor(s):: Farhad Karimi, Irena Knezevic
VALint: the NEEDS Verilog-A Checker (BETA)
21 Jan 2015 | | Contributor(s):: Xufeng Wang, Geoffrey Coram, Colin McAndrew
Verilog-A lint and pretty printer created by NEEDS