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Quantum-dot Cellular Automata
out of 5 stars
24 Nov 2003 | | Contributor(s)::
The multiple challenges presented by the problem of scaling transistor sizes are all related to the fact that transistors encode binary information by the state of a current switch. What is required is a new paradigm, still capable of providing general purpose digital computation, but which can...
recursive algorithm for NEGF in Matlab
13 Nov 2006 | | Contributor(s):: Dmitri Nikonov, Siyu Koswatta
This zip-archive contains two Matlab functions for the recursive solution of the partial matrix inversion and partial 3-matrix multiplication used in the non-equilibrium Green’s function (NEGF) method.recuresealg3d.m- works for 3-diagonal matricesrecuresealgblock3d.m- works for 3-block-diagonal...
Reliability Physics of Nanoscale Transistors
27 Nov 2007 | | Contributor(s):: Muhammad A. Alam
This course is now offered on nanoHUB as ECE 695A Reliability Physics of Nanotransistors.
RF Solid-State Vibrating Transistors
15 Feb 2014 | | Contributor(s):: Dana Weinstein
In this talk, I will discuss the Resonant Body Transistor (RBT), which can be integrated into a standard CMOS process. The first hybrid RF MEMS-CMOS resonators in Si at the transistor level of IBM’s SOI CMOS process, without any post-processing or packaging will be described. ...
16 Mar 2007 | | Contributor(s):: Arash Hazeghi, Tejas K, H.-S. Philip Wong
Simulate Carbon Nanotube field Effect transistor with Schottky Barriers
30 Mar 2006 | | Contributor(s):: Dragica Vasileska, Shaikh S. Ahmed, Gokula Kannan, Matteo Mannino, Gerhard Klimeck, Mark Lundstrom, Akira Matsudaira, Junzhe Geng
SCHRED simulation software calculates the envelope wavefunctions and the corresponding bound-state energies in a typical MOS, SOS and a typical SOI structure.
Self-Heating and Scaling of Silicon Nano-Transistors
05 Aug 2004 | | Contributor(s):: Eric Pop
The most often cited technological roadblock of nanoscale electronics is the "power problem," i.e. power densities and device temperatures reaching levels that will prevent their reliable operation. Technology roadmap (ITRS) requirements are expected to lead to more heat dissipation problems,...
Semiconductor Device Education Material
28 Jan 2008 | | Contributor(s):: Gerhard Klimeck
This page has moved to "a Wiki page format"When we hear the words, semiconductor device, we may think first of the transistors in PCs or video game consoles, but transistors are the basic component in all of the electronic devices we use in our daily lives. Electronic systems are built from...
Semiconductor Interfaces at the Nanoscale
17 Oct 2005 | | Contributor(s):: David Janes
The trend in downscaling of electronic devices and the need to add functionalities such as sensing and nonvolatile memory to existing circuitry dictate that new approaches be developed for device structures and fabrication technologies. Various device technologies are being investigated,...
Sheikh Aamir Ahsan
Simple Theory of the Ballistic MOSFET
11 Oct 2005 | | Contributor(s):: Mark Lundstrom
Silicon nanoelectronics has become silicon nanoelectronics, but we still analyze, design, and think about MOSFETs in more or less in the same way that we did 30 years ago. In this talk, I will describe a simple analysis of the ballistic MOSFET. No MOSFET is truly ballistic, but approaching this...
Simulating Quantum Transport in Nanoscale Transistors: Real versus Mode-Space Approaches
28 Sep 2006 | | Contributor(s):: Zhibin Ren, Supriyo Datta, Mark Lundstrom, Ramesh Venugopal, D. Jovanovic
In this paper, we present a computationally efficient, two-dimensional quantum mechanical sim- ulation scheme for modeling electron transport in thin body, fully depleted, n-channel, silicon- on-insulator transistors in the ballistic limit. The proposed simulation scheme, which solves the...
Simulator for a T-stub transistor in a magnetic field
12 Mar 2010 | | Contributor(s):: Massimo Macucci
Simulates transport and shot noise in a t-stub transistor in the presence of a magnetic field
Surface Analysis of Organic Monlayers Using FTIR and XPS
02 Aug 2006 | | Contributor(s):: Jamie Nipple, Michael Toole, David Janes
Current research concerning self-assembled monolayers (SAM) focuses on the fabrication of microelectronics utilizing a semiconductor/molecule/metal junction. This study seeks to investigate various experimental techniques for creation of organic monolayers by surface analysis techniques...
SURI 2003 Conference
07 Aug 2003 |
2003 SURI Conference Proceedings
The Deployment and Evolution of the First NEEDS- Certified Model — MIT Virtual Source Compact Model for Silicon Nanotransistors
03 Sep 2015 | | Contributor(s):: Shaloo Rakheja
In my talk, I will walk you through the fundamental steps involved in developing compact models, using the MVS model as an example. From the “lessons learned” in the process of MVS release in 2013 and its subsequent updates, I will provide a checklist of good practices to adopt while...
The Elusive Spin Transistor
11 Apr 2011 | | Contributor(s):: Supriyo Datta
This presentation is a short introductory tutorial on spin-transistors.
The Limits of CMOS Scaling from a Power-Constrained Technology Optimization Perspective
17 Oct 2006 | | Contributor(s)::
As CMOS scaling progresses, it is becoming very clear that power dissipation plays a dominant role in limiting how far scaling can go. This talk will briefly describe the various physical effects that arise at the limits of scaling, and will then turn to an analysis of scaling in the presence of...