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Introduction to Compact Models and Circuit Simulation
21 Jun 2013 | | Contributor(s):: Jaijeet Roychowdhury
With NEEDS introduction by Mark Lundstrom. This talk contains a brief introduction to Verilog-A and suggests some initial guidelines for writing Verilog-A versions of NEEDS models.
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A Quick Circuit Simulation Primer
25 Mar 2014 | | Contributor(s):: Aadithya V Karthik
Those who write compact models for use in circuit simulation need a basic understanding of what goes on inside a circuit simulator. This presentation is a short introduction for beginners. It briefly covers how circuit equations (so-called Differential Algebraic Equations, DAEs) are built up and...
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A Short Overview of the NEEDS Initiative
06 Jun 2016 | | Contributor(s):: Mark Lundstrom
The talk is a brief overview of the program that discusses the rationale, status, and plans for NEEDS.
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A Tutorial Introduction to Negative-Capacitor Landau Transistors: Perspectives on the Road Ahead
04 Dec 2015 | | Contributor(s):: Muhammad A. Alam
In this talk, I use a simple graphical approach to demystify the device and explain why the experimental results are easy to misinterpret. Since the NC-FET is just a special case of a much broader class of phase-change devices and systems (e.g., transistors, memories, MEMS, logic-in-memory...
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Advanced CMOS Device Physics for 7 nm and Beyond
16 Dec 2015 | | Contributor(s):: Scott Thompson
This presentation is part of 2015 IEDM tutorials The industry march along Moore's Law continues and new semiconductor nodes at 7 and beyond will certainly happen. However, many device, material, and economical challenges remain. This tutorial will target understanding key device concepts for...
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Auger Generation as an Intrinsic Limit to Tunneling Field-Effect Transistor Performance
22 Sep 2016 | | Contributor(s):: Jamie Teherani
Many in the microelectronics field view tunneling field-effect transistors (TFETs) as society’s best hope for achieving a > 10× power reduction for electronic devices; however, despite a decade of considerable worldwide research, experimental TFET results have significantly...
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Carbon Nanotube Electronics: Modeling, Physics, and Applications
28 Jun 2013 | | Contributor(s):: Jing Guo
In recent years, significant progress in understanding the physics of carbon nanotube electronic devices and in identifying potential applications has occurred. In a nanotube, low bias transport can be nearly ballistic across distances of several hundred nanometers. Deposition of high-k gate...
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Computational and Experimental Study of Transport in Advanced Silicon Devices
28 Jun 2013 | | Contributor(s):: Farzin Assad
In this thesis, we study electron transport in advanced silicon devices by focusing on the two most important classes of devices: the bipolar junction transistor (BJT) and the MOSFET. In regards to the BJT, we will compare and assess the solutions of a physically detailed microscopic model to...
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Connecting Compact Models to Systems Performance Assessment - A Case Study of 32-bit Micro-processors at 5-nm Technology Node Enabled by NEEDS models
25 May 2016 | | Contributor(s):: Chi-Shuen Lee
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Creating Inflections: DARPA’s Electronics Resurgence Initiative
09 Jan 2019 | | Contributor(s):: William Chappell
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Design and Compact Modeling of CMOS-MEMS Resonant Body Transistors
10 Jun 2014 | | Contributor(s):: Dana Weinstein, Luca Daniel, Bichoy W. Bahr
This talk presents the latest results of the CMOS Resonant Body Transistor (RBT) fabricated in standard 32nm SOI CMOS. Using phononic crystals formed from the CMOS stack, we will discuss methods for 10x improvement of Q and suppression of spurious modes.
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Developing compact models or MEMs, silicon photonics and uncertainty quantifications
25 May 2016 | | Contributor(s):: Lily Weng
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Device Physics and Simulation of Silicon Nanowire Transistors
28 Jun 2013 | | Contributor(s):: Jing Wang
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits, many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has attracted broad attention from both the semiconductor industry...
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Device Physics Studies of III-V and Silicon MOSFETS for Digital Logic
28 Jun 2013 | | Contributor(s):: Himadri Pal
III-V's are currently gaining a lot of attraction as possible MOSFET channel materials due to their high intrinsic mobility. Several challenges, however, need to be overcome before III-V's can replace silicon (Si) in extremely scaled devices. The effect of low density-of-states of III-V materials...
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Direct Solution of the Boltzmann Transport Equation in Nanoscale Si Devices
28 Jun 2013 | | Contributor(s):: Kausar Banoo
Predictive semiconductor device simulation faces a challenge these days. As devices are scaled to nanoscale lengths, the collision-dominated transport equations used in current device simulators can no longer be applied. On the other hand, the use of a better, more accurate Boltzmann Transport...
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Electron Phonon Interaction in Carbon Nanotube Devices
28 Jun 2013 | | Contributor(s):: Sayed Hasan
With the end of silicon technology scaling in sight, there has been a lot of interest in alternate novel channel materials and device geometry. Carbon nanotubes, the ultimate one-dimensional (1D) wire, is one such possibility. Since the report of the first CNT transistors, lots has been learned...
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Emerging CMOS Technology at 5 nm and Beyond: Device Options and Trade-offs
14 Dec 2015 | | Contributor(s):: Mark Lundstrom, Xingshu Sun, Dimitri Antoniadis, Shaloo Rakheja
Device Options and Trade-offs
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Exploring New Channel Materials for Nanoscale CMOS
28 Jun 2013 | | Contributor(s):: Anisur Rahman
The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the performance of nanoscale CMOS devices. Novel process techniques, such as ALD, high-# dielectrics, and...
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Formulating ModSpec or: what is a device, exactly?
27 Mar 2017 | | Contributor(s):: Jaijeet Roychowdhury, Tianshi Wang, Karthik Aadithya, A. Gokcen Mahmutoglu, Archit Gupta, Bichen Wu
ModSpec is a mathematically-based, multi-physics format for describing devices and their interaction with networks. This document details the "derivation" of the ModSpec format, describes the MATLAB API for ModSpec, and provides detailed examples.
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From Lilienfeld to Landauer: Understanding the nanoscale transistor
30 Apr 2013 | | Contributor(s):: Mark Lundstrom
The talk is organized around the so-called Virtual Source model of the MOSFET and will show how the traditional view of the MOSFET (which dates from the 1960s) can be adapted to todays nanoscale transistors in a physically insightful and simple way. The talk aims to show that understanding the...