Tags: NEEDS node

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  1. Introduction to Compact Models and Circuit Simulation

    21 Jun 2013 | Online Presentations | Contributor(s): Jaijeet Roychowdhury

    With NEEDS introduction by Mark Lundstrom. This talk contains a brief introduction to Verilog-A and suggests some initial guidelines for writing Verilog-A versions of NEEDS models.

    http://nanohub.org/resources/18678

  2. A Tutorial Introduction to Negative-­Capacitor Landau Transistors: Perspectives on the Road Ahead

    04 Dec 2015 | Online Presentations | Contributor(s): Muhammad A. Alam

    In this talk, I use a simple graphical approach to demystify the device and explain why the experimental results are easy to misinterpret. Since the NC-FET is just a special case of a much broader...

    http://nanohub.org/resources/23157

  3. Advanced CMOS Device Physics for 7 nm and Beyond

    16 Dec 2015 | Presentation Materials | Contributor(s): Scott Thompson

    This presentation is part of 2015 IEDM tutorials The industry march along Moore's Law continues and new semiconductor nodes at 7 and beyond will certainly happen. However, many device,...

    http://nanohub.org/resources/23282

  4. Ambipolar Virtual Source Compact Model for Graphene FETs

    22 Oct 2014 | Compact Models | Contributor(s):

    By Shaloo Rakheja1, Dimitri Antoniadis1

    Massachusetts Institute of Technology (MIT)

    This is a compact physics-based ambipolar-virtual-source (AVS) model that describes carrier transport in both unipolar and ambipolar regimes in quasi-ballistic graphene field-effect transistors...

    http://nanohub.org/publications/10/?v=1

  5. Carbon Nanotube Electronics: Modeling, Physics, and Applications

    28 Jun 2013 | Papers | Contributor(s): Jing Guo

    In recent years, significant progress in understanding the physics of carbon nanotube electronic devices and in identifying potential applications has occurred. In a nanotube, low bias transport...

    http://nanohub.org/resources/18742

  6. Computational and Experimental Study of Transport in Advanced Silicon Devices

    28 Jun 2013 | Papers | Contributor(s): Farzin Assad

    In this thesis, we study electron transport in advanced silicon devices by focusing on the two most important classes of devices: the bipolar junction transistor (BJT) and the MOSFET. In regards...

    http://nanohub.org/resources/18769

  7. Connecting Compact Models to Systems Performance Assessment - A Case Study of 32-bit Micro-processors at 5-nm Technology Node Enabled by NEEDS models

    25 May 2016 | Presentation Materials | Contributor(s): Chi-Shuen Lee

    http://nanohub.org/resources/24217

  8. Developing compact models or MEMs, silicon photonics and uncertainty quantifications

    25 May 2016 | Presentation Materials | Contributor(s): Lily Weng

    http://nanohub.org/resources/24219

  9. Device Physics and Simulation of Silicon Nanowire Transistors

    28 Jun 2013 | Papers | Contributor(s): Jing Wang

    As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits, many novel device structures are being extensively explored. Among them, the...

    http://nanohub.org/resources/18740

  10. Device Physics Studies of III-V and Silicon MOSFETS for Digital Logic

    28 Jun 2013 | Papers | Contributor(s): Himadri Pal

    III-V's are currently gaining a lot of attraction as possible MOSFET channel materials due to their high intrinsic mobility. Several challenges, however, need to be overcome before III-V's can...

    http://nanohub.org/resources/18697

  11. Direct Solution of the Boltzmann Transport Equation in Nanoscale Si Devices

    28 Jun 2013 | Papers | Contributor(s): Kausar Banoo

    Predictive semiconductor device simulation faces a challenge these days. As devices are scaled to nanoscale lengths, the collision-dominated transport equations used in current device simulators...

    http://nanohub.org/resources/18767

  12. Electron Phonon Interaction in Carbon Nanotube Devices

    28 Jun 2013 | Papers | Contributor(s): Sayed Hasan

    With the end of silicon technology scaling in sight, there has been a lot of interest in alternate novel channel materials and device geometry. Carbon nanotubes, the ultimate one-dimensional (1D)...

    http://nanohub.org/resources/18733

  13. Emerging CMOS Technology at 5 nm and Beyond: Device Options and Trade-offs

    14 Dec 2015 | Presentation Materials | Contributor(s): Mark Lundstrom, Xingshu Sun, Dimitri Antoniadis, Shaloo Rakheja

    Device Options and Trade-offs

    http://nanohub.org/resources/23273

  14. Exploring New Channel Materials for Nanoscale CMOS

    28 Jun 2013 | Papers | Contributor(s): Anisur Rahman

    The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the...

    http://nanohub.org/resources/18738

  15. FET pH Sensor Model

    03 Nov 2014 | Compact Models | Contributor(s):

    By Piyush Dak1, Muhammad A. Alam1

    Purdue University

    The FET pH sensor model is a surface potential compact model for FET based pH sensors that accurately describes the physics of electrolyte and surface charges that respond to pH.

    http://nanohub.org/publications/11/?v=1

  16. From Lilienfeld to Landauer: Understanding the nanoscale transistor

    30 Apr 2013 | Online Presentations | Contributor(s): Mark Lundstrom

    The talk is organized around the so-called Virtual Source model of the MOSFET and will show how the traditional view of the MOSFET (which dates from the 1960’s) can be adapted to today’s...

    http://nanohub.org/resources/17719

  17. Guidelines for Writing NEEDS-certified Verilog-A Compact Models

    19 Jun 2013 | Online Presentations | Contributor(s): Tianshi Wang, Jaijeet Roychowdhury

    This talk contains a brief introduction to Verilog-A and suggests some initial guidelines for writing Verilog-A versions of NEEDS models. For more about the history of Verilog-A and additional...

    http://nanohub.org/resources/18621

  18. III-V Nanoscale MOSFETS: Physics, Modeling, and Design

    28 Jun 2013 | Papers | Contributor(s): Yang Liu

    As predicted by the International Roadmap for Semiconductors (ITRS), power consumption has been the bottleneck for future silicon CMOS technology scaling. To circumvent this limit, researchers are...

    http://nanohub.org/resources/18694

  19. III-V Tunnel FET Model

    20 Apr 2015 | Compact Models | Contributor(s):

    By Huichu Liu1, Vinay Saripalli1, Vijaykrishnan Narayanan1, Suman Datta1

    Penn State University

    The III-V Tunnel FET Model is a look-up table based model, where the device current and capacitance characteristics are obtained from calibrated TCAD Sentaurus simulation.

    http://nanohub.org/publications/12/?v=2

  20. Inelastic Transport in Carbon Nanotube Electronic and Optoelectronic Devices

    28 Jun 2013 | Papers | Contributor(s): Siyu Koswatta

    Discovered in the early 1990's, carbon nanotubes (CNTs) are found to have exceptional physical characteristics compared to conventional semiconductor materials, with much potential for devices...

    http://nanohub.org/resources/18707