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  1. Formulating ModSpec or: what is a device, exactly?

    27 Mar 2017 | Presentation Materials | Contributor(s): Karthik Aadithya, Archit Gupta, A. Gokcen Mahmutoglu, Jaijeet Roychowdhury, Tianshi Wang, Bichen Wu

    ModSpec is a mathematically-based, multi-physics format for describing devices and their interaction with networks. This document details the "derivation" of the ModSpec format,...

    http://nanohub.org/resources/26197

  2. ModSpec: an Open, Universal, Low-Level Model API: Proposal for designation as a CMC-approved standard

    27 Mar 2017 | Presentation Materials | Contributor(s): Jaijeet Roychowdhury, Tianshi Wang, A. Gokcen Mahmutoglu, Archit Gupta

    This is a presentation given to the CMC (Compact Modeling Coalition) on March 23, 2017, describing the ModSpec device modelling format and its benefits as a standard for compact model...

    http://nanohub.org/resources/26195

  3. Well-Posed Device Models for Electrical Circuit Simulation

    27 Mar 2017 | Papers | Contributor(s): A. Gokcen Mahmutoglu, Tianshi Wang, Archit Gupta, Jaijeet Roychowdhury

    This document provides guidelines for creating computational device models that work well in simulation. We build our discussion around the mathematical notion of “well-posedness”. We...

    http://nanohub.org/resources/26199

  4. Simulation-ready Compact Modeling of Memristive Devices

    25 May 2016 | Presentation Materials | Contributor(s): Tianshi Wang

    http://nanohub.org/resources/24221

  5. Flexible Transition Metal Dichalcogenide Field-Effect Transistor (TMDFET) HSPICE Model

    08 Feb 2016 | Downloads | Contributor(s): Morteza Gholipour, Ying-Yu Chen, Deming Chen

    SPICE model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs) for different types of materials (MoS2, MoSe2, MoTe2, WS2, WSe2), considering effects when scaling the...

    http://nanohub.org/resources/23426

  6. Hybrid CMOS/SET models for PSpice?

    Closed | Responses: 0

    Hello! Can anyone tell me where can I find models for hybrid transistors (CMOS and Sinlgle Electron) for designing circuits in PSpice? I must find them for my homework. Thank you!

    http://nanohub.org/answers/question/1404

  7. Ozgur Polat

    http://nanohub.org/members/104542

  8. Tapas Kumar Maiti

    Dr. Tapas Kumar Maiti obtained his Master of Science degree with a Gold Medal in Physics from Vidyasagar University, India, 2005. In Nov. 2005, he joined Microelectronics Centre, Dept of...

    http://nanohub.org/members/89493

  9. SPICE Models for Magnetic Tunnel Junctions Based on Monodomain Approximation

    21 Aug 2013 | Downloads | Contributor(s): Xuanyao Fong, Sri Harsha Choday, Panagopoulos Georgios, Charles Augustine, Kaushik Roy

    Models for simulating a magnetic tunnel junction in HSPICE. The usage description is included in the "USAGE" text file included in the archive. The libraries are encrypted and have been...

    http://nanohub.org/resources/19048

  10. SPICE Model of Graphene Nanoribbon FETs

    12 Jul 2013 | Downloads | Contributor(s): Ying-Yu Chen, Morteza Gholipour, Artem Rogachev, Amit Sangai, Deming Chen

    Graphene Nano-Ribbons Field-Effect Transistors HSPICE implementation based on the following two publications: [1] Y-Y. Chen, A. Rogachev, A. Sangai, G. Iannaccone, G. Fiori, and D. Chen (2013)....

    http://nanohub.org/resources/17074

  11. A methodology for SPICE-compatible modeling of nanoMOSFETs

    17 Nov 2010 | Teaching Materials | Contributor(s): Alba Graciela Avila, David Espejo

    An original SPICE-compatible model for Intel's 45nm High-K MOSFET is presented. It takes into account some Quantum-Mechanical Effects that occur at small scale like Channel Length Modulation...

    http://nanohub.org/resources/10024