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Illinois ECE 598EP Lecture 12 - Hot Chips: Boundary Resistance and Thermometry
17 Jul 2009 | Contributor(s):: Eric Pop, Omar N Sobh
Boundary Resistance and ThermometryTopics: Summary of Boundary Resistance Acoustic vs. Diffuse Mismatch Model Band to Band Tunneling Conduction Thermionic and Field Emission(3D) Photon Radiation Limit Photon Conductance of Nanoconstrictions Nanoscale Thermometry Scanning Thermal Microscopy
Illinois ECE 598EP Lecture 3.3 - Hot Chips: Electrons and Phonons
02 Mar 2009 | Contributor(s):: Eric Pop
Electrons and PhononsTopics: Energy Stored in These Vibrations The Einstein Model Einstein Low-T and High-T Behavior The Debye Model Peter Debye (1884-1966) Website Reminder The Debye Integral Debye Low-T and High-T BehaviorThese notes were breezed and uploaded by Omar Sobh
Illinois ECE 598EP Lecture 3.2 - Hot Chips: Electrons and Phonons
18 Feb 2009 | | Contributor(s):: Eric Pop, Omar N Sobh
Electrons and Phonons
Illinois ECE 598EP Lecture 3.1 - Hot Chips: Electrons and Phonons
17 Feb 2009 | | Contributor(s):: Eric Pop, Omar N Sobh
Illinois ECE 598EP Lecture 1 - Hot Chips: Atoms to Heat Sinks
out of 5 stars
29 Jan 2009 | | Contributor(s):: Eric Pop
IntroductionContent: The Big Picture Another CPU without a Heat Sink Thermal Management Methods Impact on People and Environment Packaging cost IBM S/390 refrigeration and processor packaging Intel Itanium and Pentium 4packaging Graphics Cards Under/Overclocking Environment A More Detailed Look...
Is dual gate device structure better from a thermal perspective?
01 Sep 2008 | | Contributor(s):: Dragica Vasileska, Stephen M. Goodnick
This presentation illustrates several points. First, it is shown that in nanoscale devices there is less degradation due to heating effects due to non-stationary nature of the carrier transport (velocity overshoot) in the device, which, in turn, makes less probable the interaction with phonons....