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nanoHUB-U TE Thermal Energy at the Nanoscale: Scientific Overview
21 Feb 2015 |
Dolan Fransico Byrne
Scott M. Flueckiger
On-Chip Thermoelectric Cooling Tool
29 Mar 2011 | | Contributor(s):: Shuaib Salamat, David Alberto Saenz
Simulates an embedded spot peltier cooler on a chip 1D thermal profile.
Illinois ECE 598EP Lecture 14 - Hot Chips: Power Dissipation in Semiconductors
20 Jul 2009 | | Contributor(s):: Eric Pop, Omar N Sobh
Power Dissipation in SemiconductorsTopics: Simple Power Dissipation Models Revisit Simple Landauer Resistor Continuum view of Heat Generation Details of Joule Heating in Silicon Self Heating with the Monte Carlo Method Inter Valley Phonon Scattering in Si Scattering and Deformation Potentials...
Illinois ECE 598EP Lecture 3.3 - Hot Chips: Electrons and Phonons
27 Feb 2009 | | Contributor(s):: Eric Pop
Electrons and PhononsTopics: Energy Stored in These Vibrations The Einstein Model Einstein Low-T and High-T Behavior The Debye Model Peter Debye (1884-1966) Website Reminder The Debye Integral Debye Low-T and High-T BehaviorThese notes were breezed and uploaded by Omar Sobh
Illinois ECE 598EP Lecture 3.2 - Hot Chips: Electrons and Phonons
17 Feb 2009 | | Contributor(s):: Eric Pop, Omar N Sobh
Electrons and Phonons
Illinois ECE 598EP Lecture 3.1 - Hot Chips: Electrons and Phonons
11 Feb 2009 | | Contributor(s):: Eric Pop, Omar N Sobh
Illinois ECE 598EP Hot Chips: Atoms to Heat Sinks
out of 5 stars
27 Jan 2009 | | Contributor(s):: Eric Pop
This course pursues a parallel treatment of electrical and thermal issues in modern nanoelectronics, from fundamentals to system-level issues. Topics include energy transfer through electrons and phonons, mobility and thermal conductivity, power dissipation in modern devices (CMOS, phase-change...
Illinois ECE 598EP Lecture 1 - Hot Chips: Atoms to Heat Sinks
29 Jan 2009 | | Contributor(s):: Eric Pop
IntroductionContent: The Big Picture Another CPU without a Heat Sink Thermal Management Methods Impact on People and Environment Packaging cost IBM S/390 refrigeration and processor packaging Intel Itanium and Pentium 4packaging Graphics Cards Under/Overclocking Environment A More Detailed Look...
Thermoelectric Power Factor Calculator for Superlattices
18 Oct 2008 | | Contributor(s):: Terence Musho, Greg Walker
Quantum Simulation of the Seebeck Coefficient and Electrical Conductivity in 1D Superlattice Structures using Non-Equilibrium Green's Functions