Tags: tunneling transistor

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  1. A UCSD analytic TFET model

    18 Dec 2015 | | Contributor(s):: Jianzhi Wu, Yuan Taur

    A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by...

  2. Course on Beyond CMOS Computing

    06 Jun 2013 | | Contributor(s):: Dmitri Nikonov

    Complementary metal-oxide-semiconductor (CMOS) field effect transistors (FET) underpinned the development of electronics and information technology for the last 30 years. In an amazing saga of development, the semiconductor industry (with a leading role of Intel) has shrunk the size of these...

  3. Devendra Dhaka


  4. Jamie Teherani

    James Teherani joined Columbia University as anassistant professor in the Department of Electrical Engineering in 2015. He received his BS in electrical and computer engineering from the...


  5. SungGeun Kim

    SungGeun recieved bachelor's degree from Ajou University in 2001 in electrical engineering and got master's degree at GIST(Gwangju Institute of Science and Technology) in 2005. He studied on the...