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Version 2
by Gerhard Klimeck
Version 3
by Gerhard Klimeck

Deletions or items before changed

Additions or items after changed

1 == Introduction to TCAD Simulation ==
2
3 The existing semiconductor industry is now fundamentally built on the assumption to design almost every aspect of a chip in software first.
4
5 Process simulation provides the ability to optimize and control the various processing steps such as implantation, oxidation, diffusion, etching, deposition etc. Prophet and TSuprem are tools of choice on nanoHUB.org for this endeavor. Learning about the basics of process simulation may be, however, daunting at first and there are 4 simplified process labs available in this tool set that guide students towards full blown process simulation.
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7 Device simulation either takes in process simulation data or assumes certain device geometries, doping profiles etc. and simulates electrical device performances. PADRE and Schred are tools of choice on nanoHUB.org for this simulation step. PADRE is a full-fledged simulation environment for semiclassical device simulation. It has a complicated input language that may be inappropriate for usage in class room environments, when simple device modeling concepts need to be introduced. Drift-Diffusion Lab, PN junction Lab, MOScap, and MOSFET are simplified GUI-driven tools that enable students (and professionals) to easily configure PADRE without messing around with the PADRE input language.
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9 Circuit simulation ultimately provides system level design capabilities. nanoHUB.org has a sinple interface to the Berkeley Spice3f4 for such usages.
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11 This nanoHUB "topic page" provides an easy access to selected nanoHUB Semiconductor Device Education Material that is openly accessible and usable by everyone around the world.
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13 We invite you to participate in this open source, interactive educational initiative:
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15 * [http://www.nanohub.org/contribute/ Contribute your content] by uploading it to the nanoHUB. (See "Contribute Content") on the nanoHUB mainpage.
16 * Provide feedback for the items you use on the nanoHUB through the review system. (Please be explicit and provide constructive feedback.)
17 * Let us know when things do not work for you - file a ticket through the nanoHUB "Help" feature on every page
18 * Finally, let us know what you are doing and [http://www.nanohub.org/feedback/suggestions/ your suggestions] improving the nanoHUB by using the "Feedback" section, which you can find under "[http://www.nanohub.org/support/ Support]"
19
20 Thank you for using the nanoHUB, and be sure to [http://www.nanohub.org/feedback/success_story/ share your nanoHUB success stories] with us. We like to hear from you, and our sponsors need to know that the nanoHUB is having impact.
21
22
23 == Semiconductor Process Modeling ==
24
25 Semiconductor process modeling is a vast field in which several commercial products are available and in use for production in industry and to some extent in education. nanoHUB is serving a few applications that are primarily geared towards education. The four tools entitled 'Process Lab ...'[/tools/atcadlab/ Oxidation], [/tools/atcadlab/ Oxidation Flux], [/tools/atcadlab/ Concentration Dependent Diffusion], and [/tools/atcadlab/ Point Defect Coupled Diffusion] are all educational front-ends to the general [/tools/atcadlab Prophet tool in aTCADlab].
26
27 === [/tools/atcadlab Process Lab: Oxidation] ===
28
29 [[Image(/site/resources/tools/prolabox/prolabox.gif, 120 class=align-right)]] The [/tools/atcadlab/ Oxidation Lab in aTCADlab] simulates the oxidation process in integrated circuit fabrication. It is supported by a [/site/resources/2006/10/01904/oxidation.pdf supplemental document] that describes the theory and potential experiments that can be conducted.
30
31 === [/tools/atcadlab Process Lab: Oxidation Flux] ===
32
33 [[Image(/site/resources/tools/prolaboxflux/prolaboxflux.gif, 120 class=align-right)]] The [/tools/atcadlab Process Oxidation Flux Lab in aTCADlab] simulates the oxidation flux in the oxide growth process in integrated circuit fabrication. It is supported by a [/site/resources/2006/10/01905/oxidationflux.pdf supplemental document] that describes the theory and potential experiments that can be conducted.
34
35 === [/tools/atcadlab Process Lab: Concentration Dependent Diffusion] ===
36
37 [[Image(/site/resources/tools/prolabcdd/prolabcdd.gif, 120 class=align-right)]] The [/tools/atcadlab Concentration Dependent Diffusion Lab in aTCADlab] simulates the oxidation flux in the oxide growth process in integrated circuit fabrication.
38
39 === [/tools/atcadlab/ Process Lab: Point Defect Coupled Diffusion] ===
40
41 [[Image(/site/resources/tools/prolabdcd/prolabdcd.gif, 120 class=align-right)]] The [/tools/atcadlab/ Point Defect Coupled Diffusion Lab in aTCADlab] the point-defect-coupled diffusion process in integrated circuit fabrication.
42
43 === [/tools/atcadlab/ PROPHET] ===
44
45 [[Image(/site/resources/tools/prophet/prophet.jpg, 120 class=align-right)]] [/tools/atcadlab/ PROPHET in aTCADlab] was originally developed for semiconductor process simulation. Device simulation capabilities are currently under development. PROPHET solves sets of partial differential equations in one, two, or three spatial dimensions. All model coefficients and material parameters are contained in a database library which can be modified or added to by the user. Even the equations to be solved can be specified by the end user. It is supported by an extensive set of [/site/resources/tools/prophet/doc/guide.html User Guide] pages and a seminar on [/resources/973/ Nano-Scale Device Simulations Using PROPHET].
46
47 === [/tools/atcadlab/ TSuprem4] ===
48
49 [[Image(/site/resources/tools/tsuprem4/tsuprem2.png, 120 class=align-right)]] [/tools/atcadlab/ TSuprem4] simulates the processing steps used in the manufacture of silicon integrated circuits and discrete devices. The types of processing steps modeled by the current version of the program include ion implantation, inert ambient drive-in, silicon and polysilicon oxidation and silicidation, epitaxial growth, and low temperature deposition and etching of various materials.
50
51 {{{
52 #!html
53 Because of the way TSUPREM-4 is licensed, it is available only to users on the West Lafayette campus of Purdue University. Note that you must use a network connection on campus, or else you will get an 'access denied' message.
54 }}}
55
56
57 == Device Simulation ==
58
59 === [/tools/atcadlab Drift Diffusion Lab] ===
60
61 [[Image(/site/resources/tools/semi/excess_carrier_profile_light_top.png, 120 class=align-right)]] The [/resources/5065 Drift Diffusion Lab in aTCADlab] enables a user to understand the basic concepts of DRIFT and DIFFUSION of carriers inside a semiconductor slab using different kinds of experiments. Experiments like shining light on the semiconductor, applying bias and both can be performed. This tool provides important information about carrier densities, transient and steady state currents, fermi-levels and electrostatic potentials. It is supported by two related homework assignments [/resources/4191/ #1] and [/resources/4188/ #2] in which Students are asked to explore the concepts of drift, diffusion, quasi Fermi levels, and the response to light.
62
63 Exercises:
64
65 -
* [[Resource(5181)]]
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* [[Resource(5181)]]
66
67
68
69 === [/tools/atcadlab/ PN Junction Lab] ===
70
71 [[Image(/site/resources/tools/pntoy/pnjunction.gif, 120 class=align-right)]] [/tools/atcadlab/ PN-Junction Lab in aTCADlab]: Everything you need to explore and teach the basic concepts of P-N junction devices. Edit the doping concentrations, change the materials, tweak minority carrier lifetimes, and modify the ambient temperature. Then, see the effects in the energy band diagram, carrier densities, net charge distribution, I/V characteristic, etc.
72
73 There is a significant set of associated resources available for this tool.
74 * a [/site/resources/tools/pntoy/pnjunction.swf demo of this tool]
75 * a [/resources/980/ Primer on Semiconductor Device Simulation].
76 * a Learning Module entitled [/resources/68/ PN Junction Theory and Modeling] which walks students through the PN junction theory and let's them verify concepts through on-line simulation.
77 * Homework assignment on the [/resources/893/ depletion approximation (on the undergraduate level)]
78 * Homework assignment on the [/resources/932/ depletion approximation (on the undergraduate level)]
79
80 Exercises:
81
82 -
* [[Resource(4894)]]
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* [[Resource(4894)]]
83 -
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* [[Resource(4896)]]
84 -
* [[Resource(4896)]]
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* [[Resource(4898)]]
85 -
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* [[Resource(5177)]]
86 -
* [[Resource(4898)]]
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* [[Resource(5179)]]
87 -
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* [[Resource(5183)]]
88 -
* [[Resource(5177)]]
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89 -
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90 -
* [[Resource(5179)]]
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91 -
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92 -
* [[Resource(5183)]]
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93
94
95 === [/tools/atcadlab/ Bipolar Junction Transistor Lab] ===
96
97 [[Image(/site/resources/tools/bjt/5_BJTenergy_nonequil.gif, 120 class=align-right)]] The [/tools/atcadlab/ Bipolar Junction Lab in aTCADlab] allows Bipolar Junction Transistor (BJT) simulation using a 2D mesh. It allows user to simulate npn or pnp type of device. Users can specify the Emitter, Base and Collector region depths and doping densities. Also the material and minority carrier lifetimes can be specified by the user. It is supported by a [/resources/4185/ homework assignment] in which Students are asked to find the emitter efficiency, the base transport factor, current gains, and the Early voltage. Also a qualitative discussion is requested.
98
99 [[Div(start, class=clear)]][[Div(end)]]
100
101 Exercises:
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103 -
* [[Resource(5199)]]
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* [[Resource(5199)]]
104 -
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* [[Resource(5193)]]
105 -
* [[Resource(5193)]]
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* [[Resource(5083)]]
106 -
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107 -
* [[Resource(5083)]]
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108 -
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109 -
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110 -
== MOS Capacitors ==
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111
112 === [/tools/atcadlab/ MOScap] ===
113
114 [[Image(/site/resources/tools/moscap/moscap.jpg, 120 class=align-right)]] The [/tools/atcadlab/ MOScap Tool in aTCADlab] tool enables a semi-classical analysis of MOS Capacitors. Simulates the capacitance of bulk and dual gate capacitors for a variety of different device sizes, geometries, temperature and doping profiles.
115
116 [[Div(start, class=clear)]][[Div(end)]]
117
118 Exercises:
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120 -
* [[Resource(4855)]]
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* [[Resource(4855)]]
121 -
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* [[Resource(5185)]]
122 -
* [[Resource(5185)]]
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* [[Resource(5187)]]
123 -
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* [[Resource(5189)]]
124 -
* [[Resource(5187)]]
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* [[Resource(5087)]]
125 -
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126 -
* [[Resource(5189)]]
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127 -
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128 -
* [[Resource(5087)]]
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129
130
131 === [/tools/atcadlab/ Schred] ===
132
133 [[Image(/images/tool/schred/schred.jpg, 120 class=align-right)]] [/tools/atcadlab/ Schred Tool in aTCADlab] calculates the envelope wavefunctions and the corresponding bound-state energies in a typical MOS (Metal-Oxide-Semiconductor) or SOS (Semiconductor-Oxide-Semiconductor) structure and a typical SOI structure by solving self-consistently the one-dimensional (1D) Poisson equation and the 1D Schrodinger equation.
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135 [[Div(start, class=clear)]][[Div(end)]]
136
137 Exercises:
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139 -
* [[Resource(4900)]]
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* [[Resource(4900)]]
140 -
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* [[Resource(4902)]]
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* [[Resource(4902)]]
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* [[Resource(4904)]]
142 -
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* [[Resource(4794)]]
143 -
* [[Resource(4904)]]
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* [[Resource(4796)]]
144 -
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145 -
* [[Resource(4794)]]
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146 -
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147 -
* [[Resource(4796)]]
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148
149
150
151 === [/tools/atcadlab/ MOSfet Lab] ===
152
153 [[Image(/site/resources/tools/mosfet/mosfet.jpg, 120 class=align-right)]] The [/tools/atcadlab/ MOSfet Lab in aTCADlab] tool enables a semi-classical analysis of current-voltage characteristics for bulk and SOI Field Effect Transistors (FETs) for a variety of different device sizes, geometries, temperature and doping profiles.
154
155 Exercises:
156
157 -
* [[Resource(4906)]]
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* [[Resource(4906)]]
158 -
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* [[Resource(5104)]]
159 -
* [[Resource(5104)]]
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* [[Resource(5191)]]
160 -
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* [[Resource(5085)]]
161 -
* [[Resource(5191)]]
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162 -
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163 -
* [[Resource(5085)]]
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164
165
166
167
168 === [/tools/atcadlab/ PADRE] ===
169
170 [[Image(/site/resources/tools/padre/padre.jpg, 120 class=align-right)]] [/tools/atcadlab/ PADRE in aTCADlab] is a 2D/3D simulator for electronic devices, such as MOSFET transistors. It can simulate physical structures of arbitrary geometry--including heterostructures--with arbitrary doping profiles, which can be obtained using analytical functions or directly from multidimensional process simulators such as [[Tool(prophet)]]. A variety of supplemental documents are available that deal with the PADRE software and TCAD simulation:
171
172 * [/site/resources/tools/padre/doc/index.html User Guide (HTML)]
173 * [/site/resources/2006/06/01581/intro_dd_padre_word.pdf Abbreviated First Time User Guide]
174 * [tools/padre/faq/ FAQ]
175 * A set of course notes on [/resources/1500/ Computational Electronics] with detailed explanations on bandstructure, pseudopotentials, numerical issues, and drift diffusion.
176 * [resources/1516/ Introduction to DD Modeling with PADRE]
177 * [resources/1516/ MOS Capacitors: Description and Semiclassical Simulation With PADRE]
178 * [/resources/980/ A Primer on Semiconductor Device Simulation] [[span((Seminar), class=caption)]]
179
180 Exercises:
181
182 -
* [[Resource(5051)]]
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* [[Resource(5051)]]
183
184 -
* [[Resource(1516)]]
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* [[Resource(1516)]]
185
186 -
* [[Resource(1596)]]
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* [[Resource(1596)]]
187
188 == Circuit Simulation ==
189
190 [[Image(/site/resources/tools/spice3f4/spice3f42.jpg, 120 class=align-right)]] [/tools/atcadlab/ SPICE3f4 in aTCADlab] s a general-purpose circuit simulation program for nonlinear dc, nonlinear transient, and linear ac analysis. It was developed at the University of California, Berkeley. Version 3F4 was released in 1993. Circuits may contain resistors, capacitors, inductors, mutual inductors, independent voltage and current sources, four types of dependent sources, transmission lines, and the four most common semiconductor devices: diodes, BJT's, JFET's, and MOSFET's. SPICE has built-in models for the semiconductor devices, and the user need specify only the pertinent model parameter values.
191
192 * [site/resources/tools/spice3f4/spice3f4.swf Demo: Getting Started]
193
194 * [tools/spice3f4/faq/ FAQ]
195
196 * [/site/archive/Spice3F4_Manual.pdf User's Manual (.pdf)]
197
198 * [http://bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/ EECS University of Berkeley Spice3 Website]
199
200
201 == About aTCADlab Constituent Tools ==
202 The Assembly of Basic Applications for Coordinated Understanding of Semiconductors (aTCADlab) has been put together from individual disjoint tools to enable educators and students to have a one-stop-shop in semiconductor education. It therefore benefits tremendously from the hard work that the contributors of the individual tool builders have put into their tools.
203
204 As a matter of credit, simulation runs that are performed in the aTCADlab tool are also credited to the individual tools, which help the ranking of the individual tools. We do also count the number of usages of the individual tools in the aTCADlab tool set, to measure the aTCADlab impact and possibly also improve the tool.
205
206 In the description above we do not refer to the individual tools since we want to guide the users to the composite aTCADlab tool. We cite the individual tools here explicitly so they are being given the appropriate credit and on their rspective tool pages are being linked to this aTCADlab topic page.
207
208 [[Resource(prolabox)]],
209 [[Resource(prolaboxflux)]],
210 [[Resource(prolabcdd)]],
211 [[Resource(prolabdcd)]],
212 [[Resource(prophet)]],
213 [[Resource(tsuprem4)]],
214 [[Resource(semi)]],
215 [[Resource(pntoy)]],
216 [[Resource(bjt)]],
217 [[Resource(moscap)]],
218 [[Resource(schred)]],
219 [[Resource(mosfet)]],
220 [[Resource(padre)]],
221 and
222 [[Resource(spice3f4)]].

nanoHUB.org, a resource for nanoscience and nanotechnology, is supported by the National Science Foundation and other funding agencies. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.