Resources

This talk presents an in depth look at the Verilog-A code for the R3 transistor model. It also includes some general guidelines for writing compact models.

The R3 compact model used in this workshop is published here under the list of NEEDS Compact Models.

The talk is part of the hands on workshop on developing compact models: How to Write, Develop and Implement a Real Compact Model.

NEEDS: Nano-Engineered Electronic Device Simulation Node is a resource for nanoelectronics supported by the National Science Foundation and the Semiconductor Research Corporation.

Researchers should cite this work as follows:

• Colin McAndrew (2015), "The R3 Model: Verilog-A Code," https://nanohub.org/resources/21869.

  BibTex | EndNote