A Verilog-A Compact Model for Negative Capacitance FET 1.1.3
The NC-FET compact model is a semi-physical verilog-A model of the negative capacitance transistor. We developed this self-consistent model with BSIM4/MVS and Landau theory. This model is useful to design NC-FET for high speed and low power...
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Version 1.1.3 - published on 09 Nov 2017 doi:10.4231/D3QZ22K3Z - cite this
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