NanoMOS

By Zhibin Ren1, Sebastien Goasguen1, Akira Matsudaira2, Shaikh S. Ahmed3, Kurtis Cantley4, Yang Liu5, Yunfei Gao1, Xufeng Wang1, Mark Lundstrom1

1. Purdue University 2. University of Illinois at Urbana-Champaign 3. Southern Illinois University Carbondale 4. University of Texas at Dallas 5. IBM

2-D simulator for thin body (less than 5 nm), fully depleted, double-gated n-MOSFETs

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Version 4.0.4 - published on 22 Mar 2016

doi:10.4231/D34746S60 cite this

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Versions

Version Released DOI Handle Published
4.0.4 22 Mar 2016 doi:10.4231/D34746S60 yes
4.0.3 26 Jun 2014 doi:10.4231/D3GQ6R32D no
4.0.2 10 Jun 2014 doi:10.4231/D36D5PB94 no
4.0.1 02 Apr 2013 doi:10.4231/D3J96090H no
4.0 23 Jun 2011 doi:10.4231/D3H41JM5N no
3.5.4 19 Oct 2009 doi:10.4231/D32804Z35 no
3.5.3 19 Oct 2009 doi:10.4231/D36W9684C no
3.5.2 10 Jul 2009 doi:10.4231/D3KS6J43G no
3.5.1 23 Jun 2009 doi:10.4231/D3F76666X no
3.5 23 Feb 2009 doi:10.4231/D36688J31 no
3.0.4 22 Jul 2008 doi:10.4231/D3JD4PP00 no
3.0.3 19 Jun 2008 doi:10.4231/D3VT1GP5Q no
3.0.2 09 May 2008 doi:10.4231/D3F18SD89 no
3.0.1 09 Jan 2008 doi:10.4231/D3JS9H72R no
3.0 27 Feb 2006 doi:10.4231/D3PK0716F no
2.5 15 Sep 2005 doi:10.4231/D3TB0XV1W no