CMOS Nanotechnology

By Mark Lundstrom

Purdue University

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CMOS it the technology used for modern electronics. CMOS technology continues to advance because the number of transistors on a CMOS chip continues to double each technology generation. Device designers face many challenges as they scale (i.e. shrink) transistors in order to place more on a chip. The designers of billion transistor chips face a different set of challenges. Some are caused by the changing characteristics of devices as they get smaller. Others have to do with the delays cause by the wires used to connect all these transistors. Still others are caused by the large numbers of devices on a chip.

This talk is an elementary introduction to CMOS technology. It will begin by explaining what “CMOS” stands for. It is designed to be accessible to the nonspecialist with an elementary understanding of transistors. My purpose is to explain the basic system considerations that designers deal with and to identify the challenges to maintaining progress in CMOS electronics.


Mark Lundstrom is the Don and Carol Scifres Distinguished Professor of Electrical and Computer Engineering at Purdue University where his teaching and research center on the physics, technology, and simulation of electronic devices. Lundstrom is the founding director of the NSF-funded Network for Computational Nanotechnology, which has a mission of research, education, leadership, and service to the nation’s National Nanotechnology Initiative. He serves on the leadership councils of the NASA-funded Institute for Nanoelectronics and Computing and the MARCO Focus Center for Materials, Structures, and Devices. Lundstrom’s work has been recognized by several awards, most recently, in 2005, from the Semiconductor Industry Association in recognition of his career contributions to the semiconductor industry.

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Researchers should cite this work as follows:

  • Mark Lundstrom (2004), "CMOS Nanotechnology,"

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