Exploring New Channel Materials for Nanoscale CMOS

By Anisur Rahman

Purdue University, West Lafayette, IN



Published on


The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the performance of nanoscale CMOS devices. Novel process techniques, such as ALD, high-# dielectrics, and metal gates are now being used to experimentally explore such devices. New materials in the channel promise reduced series resistance and higher on-currents. The theoretical assessment of such devices is a challenge because bandstructure, arbitrary wafer orientation, quantum effects and electrostatics must all be treated. In the first part of this work, a general theoretical approach for the quantum mechanical simulation of n-MOSFETs within the Non Equilibrium Green's Function (NEGF) formalism is introduced, and its application is demonstrated by performing a scaling study for the end of the ITRS Ge device. In the second part of this work, a systematic analysis of the bandstructure effects in deeply scaled n- and p- MOSFETs with Si, Ge, GaAs and InAs channel is performed. Here, a 20 orbital sp3d5s!-SO tight-binding model and a top-of-thebarrier quasi-2D ballistic transport model have revealed important trends in deeply scaled new channel material devices.


Anisur Rahman received his PhD from Purdue University in December of 2005.

Cite this work

Researchers should cite this work as follows:

  • Anisur Rahman (2013), "Exploring New Channel Materials for Nanoscale CMOS," https://nanohub.org/resources/18738.

    BibTex | EndNote



Purdue University, West Lafayette, IN