Parallel Computing for Realistic Nanoelectronic Simulations

By Gerhard Klimeck

Purdue University

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Typical modeling and simulation efforts directed towards the understanding of electron transport at the nanometer scale utilize single workstations as computational engines. Growing understanding of the involved physics and the need to model realistically extended devices increases the complexity and size of the modeling and simulation problems such that single CPU workstations can no longer provide fast result turn-around times. Parallelization of scientific and engineering oriented simulation codes can provide significant computational speed-up, enable the study of larger more realistic systems, and large-scale global optimization. Access to parallel machines has up to about 7 years ago been limited to an elite few people who were members of National Labs or participants in the massively parallel Computational Science community. A typical parallel computer has cost in the past several million dollars, making them generally inaccessible to a large group of software developers. The invention of Beowulf cluster computing around 1997 has spurred a dramatic revolution in the availability of parallel computers in the scientific and engineering community. With a relatively small investment of $50k-100k, which typically buys 32-64 CPUs, research groups all over the world have begun to utilize cluster computers for their scientific and engineering endeavors. This use of parallel computing will continue to increase in the future, as CPU vendors are moving more and more to multi-core chip designs. I would assume that in 5 years most computational researchers will have a 16 or 32 CPU machine sitting under their desk. Therefore I believe that parallel computing will be a key element in the future of scientific modeling.

This seminar will review the principles of parallel code development and the science of three different nanotechnology applications: GENES (Genetically Engineered Nanoelectronic Structures - a genetic algorithm-based optimization engironment), NEMO-3D (multimillion atom electronic structure calculations), and NEMO-1D (the first nanoelectronic engineering TCAD tool).


Gerhard Klimeck is the Technical Director of the Network for Computational Nanotechnology at Purdue University and a Professor of Electrical and Computer Engineering since Dec. 2003. He was the Technical Group Supervisor for the Applied Cluster Computing Technologies Group at the NASA Jet Propulsion Laboratory. His research interest is in the modeling of nanoelectronic devices, parallel cluster computing, genetic algorithms, and parallel image processing. Gerhard developed the Nanoelectronic Modeling tool (NEMO 3-D) for multimillion atom simulations and continues to expand NEMO 1-D. Previously he was a member of technical staff at the Central Research Lab of Texas Instruments where he served as manager and principal architect of the Nanoelectronic Modeling (NEMO 1-D) program. Dr. Klimeck received his Ph.D. in 1994 from Purdue University and his German electrical engineering degree in 1990 from Ruhr-University Bochum. Dr. Klimeck's work is documented in over 130 peer-reviewed publications and over 200 conference presentations. He is a senior member of IEEE and member of APS, HKN and TBP. More information about his work can be found at

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  • Gerhard Klimeck (2005), "Parallel Computing for Realistic Nanoelectronic Simulations,"

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MSEE 239, Purdue University, West Lafayette, IN