This code developed in C and CUDA simulates the carrier transport in three-dimensional (3D) topological insulator (TI) nanowire, with Bi2Se3 as exemplar material, with or without impurities, edge defects, acoustic phonons and vacancies for semi-infinite or metallic contacts (normal/magnetic) on General Purpose Graphic Processing Unit (GP-GPU) via Non-Equilibrium Green's Function (NEGF).
It can also be used for simulating energy-dispersion in Bi2Se3 TI and Group-IV monolayers with spin-orbit coupling.
It has been tested on C2070 and M2090 Tesla Cards on Scientific Linux 6.2 with the support of following open-source libraries: CBLAS, gsl-1.9, Intel_MKL_188.8.131.52, lapack-3.2.1, magma-1.3.0
The work at the National University of Singapore was supported by MOE under Grant No. R263000689112 and MOE2013-T2-2-125. This work benefited from the allocation of time at the High-Performance Computing Gold Cluster for GPGPU simulations. M.B.A.J. acknowledges the Singapore National Research Foundation for support under NRF-CRP9-2011-01.
Gaurav Gupta, Mansoor Bin Abdul Jalil and Gengchiau Liang, “Evaluation of mobility in thin Bi2Se3 Topological Insulator for prospects of Local Electrical Interconnects”. Scientific Reports 4, 6838 (2014).
Gaurav Gupta, Mansoor Bin Abdul Jalil and Gengchiau Liang, “Is Sub-10nm Thick 3D-Topological Insulator Good for the Local Electrical Interconnects?”, IEEE International Electron Devices Meeting (IEDM 2013) December 9-11, 2013, Washington DC, USA..
Cite this work
Researchers should cite this work as follows: