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Nanodevices: A Bottom-up View
13 Jun 2005 | Online Presentations | Contributor(s): Supriyo Datta
It is common to differentiate between two ways of building a nanodevice: a top-down approach where we start from something big and chisel out what we want and a bottom-up approach where we start from something small like atoms or molecules and assemble what we want.
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On the Reliability of Micro-Electronic Devices: An Introductory Lecture on Negative Bias Temperature Instability
28 Sep 2005 | Online Presentations | Contributor(s): Muhammad A. Alam
In 1930s Bell Labs scientists chose to focus on Siand Ge, rather than better known semiconductors like Ag2S and Cu2S, mostly because of their reliable performance. Their choice was rewarded with the invention of bipolar transistors several years later. In 1960s, scientists at Fairchild worked...
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Simple Theory of the Ballistic MOSFET
11 Oct 2005 | Online Presentations | Contributor(s): Mark Lundstrom
Silicon nanoelectronics has become silicon nanoelectronics, but we still analyze, design, and think about MOSFETs in more or less in the same way that we did 30 years ago. In this talk, I will describe a simple analysis of the ballistic MOSFET. No MOSFET is truly ballistic, but approaching this...
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Bandstructure in Nanoelectronics
01 Nov 2005 | Online Presentations | Contributor(s): Gerhard Klimeck
This presentation will highlight, for nanoelectronic device examples, how the effective mass approximation breaks down and why the quantum mechanical nature of the atomically resolved material needs to be included in the device modeling. Atomistic bandstructure effects in resonant tunneling...
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The Long and Short of Pick-up Stick Transistors: A Promising Technology for Nano- and Macro-Electronics
11 Apr 2006 | Online Presentations | Contributor(s): Muhammad A. Alam
In recent years, there has been enormous interest in the emerging field of large-area macro-electronics, and fabricating thin-film transistors on flexible substrates. This talk will cover recent work in developing a comprehensive theoretical framework to describe the performance of these "pick-up...
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Design in the Nanometer Regime: Process Variation
28 Nov 2006 | Online Presentations | Contributor(s): Kaushik Roy
Scaling of technology over the last few decades has produced an exponential growth in computing power of integrated circuits and an unprecedented number of transistors integrated into a single. However, scaling is facing several problems — severe short channel effects, exponential increase in...
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Design of CMOS Circuits in the Nanometer Regime: Leakage Tolerance
28 Nov 2006 | Online Presentations | Contributor(s): Kaushik Roy
The scaling of technology has produced exponential growth in transistor development and computing power in the last few decades, but scaling still presents several challenges. These two lectures will cover device aware CMOS design to address power, reliability, and process variations in scaled...