KP Nanowire/UTB FET

By Mincheol Shin

KAIST, Daejeon, Korea

Simulate Nanowire/UTB FETs Using KP method

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Version 1.0.3 - published on 21 Aug 2014

doi:10.4231/D34J09Z3M cite this

This tool is closed source.

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Usage

World usage

Location of all "KP Nanowire/UTB FET" Users Since Its Posting

Cumulative Simulation Users

532

4 4 4 4 10 12 15 18 22 27 31 35 37 43 46 50 53 56 58 61 63 67 73 76 77 81 84 91 93 93 96 100 105 113 119 129 131 134 137 138 141 143 145 149 152 158 165 168 174 177 181 185 190 196 199 203 208 215 220 224 224 227 234 237 242 247 253 257 258 263 265 269 272 274 276 278 280 282 298 300 302 303 308 314 317 320 323 324 329 331 339 342 348 352 355 359 362 365 366 368 370 373 380 380 382 383 385 388 390 394 397 397 401 401 405 406 408 410 415 415 417 417 417 420 421 422 424 427 430 431 431 436 436 437 438 442 446 447 450 453 455 456 458 459 460 467 467 468 472 474 474 477 477 478 479 480 481 482 485 485 491 494 496 498 502 505 506 510 511 513 514 519 520 520 523 527 530 532

Simulation Runs

2,448

26 29 29 75 103 123 129 226 241 258 270 279 287 320 328 332 339 361 363 374 379 394 408 416 437 445 461 474 490 504 512 526 556 575 590 639 642 650 673 686 722 728 745 755 765 777 789 793 810 817 825 773 795 817 829 837 855 869 901 915 916 922 936 947 966 981 995 1020 1027 1050 1058 1079 1086 1096 1098 1104 1109 1113 1225 1227 1232 1285 1295 1312 1318 1328 1334 1351 1393 1402 1414 1424 1444 1470 1487 1500 1505 1517 1527 1532 1542 1550 1577 1579 1595 1602 1643 1656 1670 1706 1718 1728 1788 1813 1857 1863 1868 1870 1890 1891 1903 1903 1903 1911 1917 1925 1927 1945 1951 1959 1973 1986 1997 2003 2009 2022 2063 2068 2078 2109 2118 2120 2125 2129 2131 2162 2162 2170 2192 2209 2217 2230 2233 2234 2245 2246 2249 2250 2260 2261 2273 2277 2287 2292 2312 2327 2330 2357 2362 2364 2368 2378 2380 2383 2388 2431 2442 2448
Overview
Average Total
Wall Clock Time 7.54 hours 397.88 days
CPU time 2.05 hours 108.03 days
Interaction Time 1.13 hours 59.8 days