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Simulation of the Spin Field Effect Transistors: Effects of Tunneling and Spin Relaxation on its Performance

By Yunfei Gao

Electrical and Computer Engineering, Purdue University, West Lafayette, IN

Published on


A numerical simulation of spin-dependent quantum transport for a spin field effect transistor (spinFET) is implemented in a widely used simulator nanoMOS. This method includes the effect of both spin relaxation in the channel and the tunneling barrier between the source/drain and the channel. Account for these factors permits setting more realistic performance limits for the transistor, especially the magnetoresistance, which is found to be lower compared to earlier predictions. The interplay between tunneling and spin relaxation is elucidated by numerical simulation. Insertion of the tunneling barrier leads to an increased magnetoresistance. Numerical simulations are used to explore the tunneling barrier design issues.


Yunfei Gao Yunfei Gao got his BSEE degree in Shanghai Jiao Tong University,China in June 2006. He is now working in Mark Lundstrom group in Purdue University as a research assistant.


in collaboration with Tony Low, Charles Augustine Dmitri Nikonov, Kaushik Roy, and Mark Lundstorm.



Birck Nanotechnology Center, Rm 2001, Purdue University, West Lafayette, IN

Tags, a resource for nanoscience and nanotechnology, is supported by the National Science Foundation and other funding agencies. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.