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ECE 612 Lecture 11: The Quasi-ballistic MOSFET
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18 Sep 2006 | | Contributor(s):: Mark Lundstrom
Towards Multi-Scale Modeling of Carbon Nanotube Transistors
20 Sep 2006 | | Contributor(s):: Jing Guo, Supriyo Datta, Mark Lundstrom, M. P. Anantram
Multiscale simulation approaches are needed in order to address scientific and technological questions in the rapidly developing field of carbon nanotube electronics. In this paper, we describe an effort underway to develop a comprehensive capability for multiscale simulation of carbon nanotube...
Logic Devices and Circuits on Carbon Nanotubes
05 Apr 2006 | | Contributor(s):: Joerg Appenzeller
Over the last years carbon nanotubes (CNs) have attracted an increasing interest as building blocks for nano-electronics applications. Due to their unique properties enabling e.g. ballistic transport at room-temperature over several hundred nanometers, high performance CN field-effect...
Exploring New Channel Materials for Nanoscale CMOS
21 May 2006 | | Contributor(s):: anisur rahman
The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the performance of nanoscale CMOS devices.Novel process techniques, such as ALD, high-k dielectrics, and...
Device Physics and Simulation of Silicon Nanowire Transistors
20 May 2006 |
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits, many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has attracted broad attention from both the semiconductor industry...
Optimization of Transistor Design for Carbon Nanotubes
20 Jan 2006 | | Contributor(s):: Jing Guo
We have developed a self-consistent atomistic simulator for CNTFETs.Using the simulator, we show that a recently reported high-performanceCNTFET delivers a near ballistic on-current. The off-state, however, issignificantly degraded because the CNTFET operates like anon-conventional Schottky...
A 3D Quantum Simulation of Silicon Nanowire Field-Effect Transistors
17 Jan 2006 | | Contributor(s):: Mincheol Shin
As the device size of the conventional planar metal oxide semiconductor field effect transistor(MOSFET) shrinks into the deep sub micron regime, the device performance significantly degradesmainly due to the short-channel effect. The silicon nanowire field-effect transistor (SNWFET) isconsidered...
Ballistic Nanotransistors - Learning Module
07 Dec 2005 | | Contributor(s):: Mark Lundstrom
This resource is an introduction to the theory ballistic nanotransistors. No transistor is fully ballistic, but analyzing nanotransistors by neglecting scattering processes provides new insights into the performance and limits of nanoscale MOSFETs. The materials presented below introduces the...
Notes on the Ballistic MOSFET
08 Oct 2005 | | Contributor(s):: Mark Lundstrom
When analyzing semiconductor devices, the traditional approach is to assume that carriers scatter frequently from ionized impurities, phonons, surface roughness, etc. so that the average distance between scattering events (the so-called mean-free-path, λ) is much shorter than the device. When...
Simple Theory of the Ballistic MOSFET
11 Oct 2005 | | Contributor(s):: Mark Lundstrom
Silicon nanoelectronics has become silicon nanoelectronics, but we still analyze, design, and think about MOSFETs in more or less in the same way that we did 30 years ago. In this talk, I will describe a simple analysis of the ballistic MOSFET. No MOSFET is truly ballistic, but approaching this...
On the Reliability of Micro-Electronic Devices: An Introductory Lecture on Negative Bias Temperature Instability
28 Sep 2005 | | Contributor(s):: Muhammad A. Alam
In 1930s Bell Labs scientists chose to focus on Siand Ge, rather than better known semiconductors like Ag2S and Cu2S, mostly because of their reliable performance. Their choice was rewarded with the invention of bipolar transistors several years later. In 1960s, scientists at Fairchild worked...
Self-Heating and Scaling of Silicon Nano-Transistors
05 Aug 2004 | | Contributor(s):: Eric Pop
The most often cited technological roadblock of nanoscale electronics is the "power problem," i.e. power densities and device temperatures reaching levels that will prevent their reliable operation. Technology roadmap (ITRS) requirements are expected to lead to more heat dissipation problems,...
Theory of Ballistic Nanotransistors
27 Nov 2002 | | Contributor(s):: Anisur Rahman, Jing Guo, Supriyo Datta, Mark Lundstrom
Numerical simulations are used to guide the development of a simple analytical theory for ballistic field-effect transistors. When two-dimensional electrostatic effects are small, (and when the insulator capacitance is much less than the semiconductor (quantum) capacitance), the model reduces to...