All Categories (1-6 of 6)

1. A UCSD analytic TFET model

   18 Dec 2015 | | Contributor(s):: Jianzhi Wu, Yuan Taur

   A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by...

2. 

   Praveen C S

   https://www.linkedin.com/profile/view?id=154256162&trk=nav_responsive_tab_profile

   https://nanohub.org/members/109012

3. Course on Beyond CMOS Computing

   06 Jun 2013 | | Contributor(s):: Dmitri Nikonov

   Complementary metal-oxide-semiconductor (CMOS) field effect transistors (FET) underpinned the development of electronics and information technology for the last 30 years. In an amazing saga of development, the semiconductor industry (with a leading role of Intel) has shrunk the size of these...

4. 

   Vishnuvarthan Kumaresan

   https://nanohub.org/members/58860

5. 

   jawar

   https://nanohub.org/members/21961

6. Computational Electronics

   out of 5 stars 

   02 Jun 2006 | | Contributor(s):: Dragica Vasileska

   Scaling of CMOS devices into the nanometer regime leads to increased processing cost. In this regard, the field of Computational Electronics is becoming more and more important because device simulation offers unique possibility to test hypothetical devices which have not been fabricated yet...