All Categories (1-20 of 35)

1. 25 Linearity by Synthesis: An Intrinsically Linear AlGaN/GaN-on-Si Transistor with OIP3/(F-1)PDC of 10.1 at 30 GHz

   21 Sep 2020 | | Contributor(s):: Woojin Choi, Venkatesh Balasubramanian, Peter M. Asbeck, Shadi Dayeh

   The concept of an intrinsically synthesizable linear device is demonstrated. It was implemented by changing only the device layout; additional performance gains can be attained by further materials engineering.

2. 7nm Si FinFET Models with Symmetric and Asymmetric Underlap for Circuit Simulations

   23 Aug 2013 | | Contributor(s):: Arun Goud Akkala, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy

   This tarball contains Verilog-A compact lookup table models for 7nm channel length Si FinFET with different underlaps which can be used in HSPICE netlists for circuit simulations. Device simulation data for constructing the lookup table model was generated using NEMO5 atomistic...

3. Are there any clear advantages to either UTB SOI vs FinFet devices?

   Q&A|Open | Responses: 1

   I have been doing some reading on these devices and it seems that both structures give the gate more control and suppress the influence of the drain voltage on the channel. So, is there a clear...

   https://nanohub.org/answers/question/934

4. Finfet raw files needed

   Q&A|Closed | Responses: 0

    

   Hello, I wanted to simulate these files using HSpice. I wanted to see the transfer characteristics for temperature variation. Unfortunately the look up table is designed in such...

   https://nanohub.org/answers/question/1566

5. how to decide device characteristic while designing a device?

   Q&A|Closed | Responses: 0

   Hello,

   https://nanohub.org/answers/question/1652

6. How to get a model file for FinFET  ???

   Q&A|Closed | Responses: 0

   https://nanohub.org/answers/question/1146

7. How to get the Finfet model library file for cadence for simulation ???

   Q&A|Closed | Responses: 0

   https://nanohub.org/answers/question/1148

8. A Single Atom Transistor: The Ultimate Scaling Limit – Entry into Quantum Computing

   14 Oct 2020 | | Contributor(s):: Gerhard Klimeck

   50th European Solid-State Device Research Conference

9. 

   Achintya Priydarshi

   https://nanohub.org/members/145038

10. 

    Asrulnizam Abd Manaf

    Dr. Asrulnizam bin Abd Manaf received the BEng in Electrical and Electronic Engineering from Toyohashi University of Technology, Japan in 2001. Then, he worked as electrical engineer at Toyo-Memory...

    https://nanohub.org/members/70293

11. Bandstructure Effects in Nano Devices With NEMO: from Basic Physics to Real Devices and to Global Impact on nanoHUB.org

    08 Mar 2019 | | Contributor(s):: Gerhard Klimeck

    This presentation will intuitively describe how bandstructure is modified at the nanometer scale and what some of the consequences are on the device performance.

12. Concept of FinFET Part-I

    05 Mar 2021 | | Contributor(s):: Ashish anil Bait

    Here is the video introducing latest transistor technology used in processors.

13. Concept of FinFET Part-II

    05 Mar 2021 | | Contributor(s):: Ashish anil Bait

    Here is the video introducing latest transistor technology used in processors.

14. Contact Resistances in Trigate & FinFET Devices

    22 Mar 2016 | | Contributor(s):: Yann-Michel Niquet

    IWCE 2015 presentation.

15. ECE 606 L32.3: Modern MOSFET - Control of Threshold Voltage

    20 Jul 2023 | | Contributor(s):: Gerhard Klimeck

16. ECE 606 L32.4: Modern MOSFET - Mobility Enhancement

    20 Jul 2023 | | Contributor(s):: Gerhard Klimeck

17. EOLAS NEGF Transport Simulator

    18 May 2021 | | Contributor(s):: Alfonso Sanchez, Thomas Kelly

    Effective-mass / NEGF simulator for electronic transport in Si nanostructures

18. I want to make a compact model for FinFET with Verilog-A to use it in HSpice, but I'm really new in this subject and don't know where to start. Can anyone help me with some documents in this subject?

    Q&A|Closed | Responses: 0

    https://nanohub.org/answers/question/1942

19. 

    Keerti Kumar Korlapati

    https://nanohub.org/members/55518

20. 

    Mohamed Tarek Ghoneim

    Keywords: device physics, flexible electronics, nanotechnology, graphene, nonvolatile memory, reliability, CMOS, physical and electrical characterization, emerging devices, power management, VLSI,...

    https://nanohub.org/members/77955