Tags: MOSFET

Description

The metal–oxide–semiconductor field-effect transistor is a device used for amplifying or switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a conducting channel between the two other contacts called source and drain. The channel can be of n-typeor p-type, and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS). It is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common. More information on MOSFET can be found here.

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  1. ECE 612 Lecture 18A: CMOS Process Steps

    12 Nov 2008 | | Contributor(s):: Mark Lundstrom

    Outline: 1) Unit Process Operations,2) Process Variations.

  2. ECE 612 Lecture 18B: CMOS Process Flow

    18 Nov 2008 | | Contributor(s):: Mark Lundstrom

    For a basic, CMOS process flow for an STI (shallow trench isolation process), see: http://www.rit.edu/~lffeee/AdvCmos2003.pdf.This lecture is a condensed version of the more complete presentation (listed above) by Dr. Fuller.

  3. ECE 612 Lecture 26: Heterostructure FETs

    10 Dec 2008 | | Contributor(s):: Mark Lundstrom

    Outline:1) Introduction,2) Heterojunction review,3) Modulation doping,4) I-V characteristics,5) Device Structure / Materials,6) Summary.

  4. ECE 612 Lecture 7: Scattering Theory of the MOSFET I

    08 Oct 2008 | | Contributor(s):: Mark Lundstrom

    Outline: 1) Review and introduction,2) Scattering theory of the MOSFET,3) Transmission under low VDS,4) Transmission under high VDS,5) Discussion,6) Summary.

  5. ECE 612 Lecture 8: Scattering Theory of the MOSFET II

    08 Oct 2008 | | Contributor(s):: Mark Lundstrom

    Outline: 1) Review and introduction,2) Scattering theory of the MOSFET,3) Transmission under low VDS,4) Transmission under high VDS,5) Discussion,6) Summary.

  6. ECE 695A Lecture 9R: Review Questions

    08 Feb 2013 | | Contributor(s):: Muhammad Alam

    Review Questions:Does NBTI power-exponent depend on voltage or temperature?Do you expect the NBTI power-exponent to be larger or smaller if trapping is important?How does one know that the diffusing species is neutral?How would the time-exponent different for a surround gate MOSFET vs. planar...

  7. Electronics From the Bottom Up: top-down/bottom-up views of length

    17 Aug 2007 | | Contributor(s):: Muhammad A. Alam

    When devices get small stochastic effects become important. Random dopant effects lead to uncertainties in a MOSFET’s threshold voltage and gate oxides breakdown is a random process. Even a concept as simple as “channel length” becomes uncertain. This short (20 min) talk, a footnote to the...

  8. Exercise for MOSFET Lab: Device Scaling

    28 Jun 2010 | | Contributor(s):: Dragica Vasileska, Gerhard Klimeck

    This exercise explores device scaling and how well devices are designed.

  9. Exercise for MOSFET Lab: DIBL Effect

    03 Aug 2009 | | Contributor(s):: Dragica Vasileska, Gerhard Klimeck

    In this exercise students are required to examine the drain induced barrier lowering (DIBL) effect in short channel MOSFET devices.

  10. Exercise for MOSFET Lab: Long Channel vs. Short Channel Device

    03 Aug 2009 | | Contributor(s):: Dragica Vasileska

    In this exercise studentsare required to simulate long channel device for which the graduate channel approximation is valid and the short channel device for which velocity saturation effect starts to play significant role.

  11. Exploring New Channel Materials for Nanoscale CMOS

    28 Jun 2013 | | Contributor(s):: Anisur Rahman

    The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the performance of nanoscale CMOS devices. Novel process techniques, such as ALD, high-# dielectrics,...

  12. Fabrication of a MOSFET within a Microprocessor

    16 Nov 2005 |

    This resource depicts the step-by-step process by which the transistors of an integrated circuit are made.

  13. Faster Materials versus Nanoscaled Si and SiGe: A Fork in the Roadmap?

    20 Apr 2004 | | Contributor(s):: Jerry M. Woodall

    Strained Si and SiGe MOSFET technologies face fundamental limits towards the end of this decade when the technology roadmap calls for gate dimensions of 45 nm headed for 22 nm. This fact, and difficulties in developing a suitable high-K dielectric, have stimulated the search for alternatives to...

  14. FETToy

    14 Feb 2006 | | Contributor(s):: Anisur Rahman, Jing Wang, Jing Guo, Md. Sayed Hasan, Yang Liu, Akira Matsudaira, Shaikh S. Ahmed, Supriyo Datta, Mark Lundstrom

    Calculate the ballistic I-V characteristics for conventional MOSFETs, Nanowire MOSFETs and Carbon NanoTube MOSFETs

  15. FETToy 2.0 Source Code Download

    09 Mar 2005 |

    FETToy 2.0 is a set of Matlab scripts that calculate the ballistic I-V characteristics for a conventional MOSFETs, Nanowire MOSFETs and Carbon NanoTube MOSFETs. For conventional MOSFETs, FETToy assumes either a single or double gate geometry and for a nanowire and nanotube MOSFETs it assumes a...

  16. Green Light on Germanium

    02 Nov 2015 | | Contributor(s):: peide ye

    This talk will review recent progress as well as challenges on Ge research for future logic applications with emphasis on the breakthrough work at Purdue University on Ge nFET which leads to the demonstration of the world first Ge CMOS circuits on Si substrates. Ge device technology includes...

  17. Himanshu Rai

    https://nanohub.org/members/117669

  18. III-V Nanoscale MOSFETS: Physics, Modeling, and Design

    25 Jun 2013 | | Contributor(s):: Yang Liu

    As predicted by the International Roadmap for Semiconductors (ITRS), power consumption has been the bottleneck for future silicon CMOS technology scaling. To circumvent this limit, researchers are investigating alternative structures and materials, among which III-V compound semiconductor-based...

  19. Illinois ECE 440 Solid State Electronic Devices, Lecture 33: MOS Capacitance

    02 Mar 2010 | | Contributor(s):: Eric Pop

  20. Illinois ECE 440 Solid State Electronic Devices, Lecture 34: MOS Field Effect Transistor (FET)

    01 Mar 2010 | | Contributor(s):: Eric Pop