Tags: Verilog

All Categories (1-8 of 8)

  1. Qazi Shahid Ullah

    https://nanohub.org/members/322959

  2. Dhanu Chettri

    https://nanohub.org/members/157882

  3. Guidelines for Writing NEEDS-certified Verilog-A Compact Models

    19 Jun 2013 | | Contributor(s):: Tianshi Wang, Jaijeet Roychowdhury

    This talk contains a brief introduction to Verilog-A and suggests some initial guidelines for writing Verilog-A versions of NEEDS models. For more about the history of Verilog-A and additional guidelines for writing Verilog-A models, see the presentation by Drs. Geoffrey Coram and Colin McAndrew.

  4. Introduction to Compact Models and Circuit Simulation

    19 Jun 2013 | | Contributor(s):: Tianshi Wang, Jaijeet Roychowdhury

    The presentation is a gentle introduction to compact models, basic circuit simulation concepts, and flows for developing compact models. The roadmap for the NEEDS-SPICE platform, being developed to ease the process of developing simulation-ready compact models for novel nanodevices, is briefly...

  5. NEEDS Introduction

    19 Jun 2013 | | Contributor(s):: Mark Lundstrom

    NEEDS is an initiative supported by the National Science Foundation and the Semiconductor Research Corporation with a mission to develop the critical missing link needed to transform nanoelectronic materials and device research into electronic systems – physics-based compact models for...

  6. NEEDS Workshop on Compact Modeling

    19 Jun 2013 | | Contributor(s):: Mark Lundstrom, Jaijeet Roychowdhury

    Advanced inresearch promise a new era of electronics – one that harnesses the capabilities of novel nano-­‐engineered materials and devices either alone or in conjunction with powerful silicon platforms. Compact models connect basic work on materials and device physics to circuits and systems....

  7. Verilog-A: Present Status and Guidelines

    19 Jun 2013 | | Contributor(s):: Geoffrey Coram

    Verilog-A is the standard language for compact model development and implementation. This talk provides some background on the rationale for and development of Verilog-A, summarizes the current status of the language, and provides a short introduction and some tips for writing good compact...

  8. Farshid Hajhashemi

    https://nanohub.org/members/73368