About
This zip contains Verilog-A compact lookup table models for 9nm channel length GaSb-InAs n/p TFET which can be used in HSPICE netlists for circuit simulations. Device simulation data for constructing the lookup table model was generated using NEMO5 atomistic tight binding transport simulator (also available on Nanohub.org).
Usage notes, manual, example input netlists and full device description are also included.
