Notre Dame TFET Model
2017-09-01 17:35:14 | Contributor(s): Hao Lu, Trond Ytterdal, Alan Seabaugh | doi:10.4231/D3CF9J852
To gain more insights into the benefits of tunnel FETs in low power circuit applications and make performance projections, a universal analytical TFET SPICE model that captures the essential features of the tunneling process has been developed [
JFETIDG Model for Independent Dual-Gate JFETs
2017-07-27 12:55:51 | Contributor(s): Colin McAndrew, Kejun Xia | doi:10.4231/D3KK94F1N
JFETIDG is a compact model for independent dual-gate JFETs. It is also applicable to: resistors with metal shields; the drift region of LDMOS transistors; the collector resistance of vertical bipolar transistors; and junctionless MOS transistors.
Compact model for Perpendicular Magnetic Anisotropy Magnetic Tunnel Junction
2017-08-25 13:34:10 | Contributor(s): You WANG, Yue ZHANG, Jacques-Olivier Klein, Thibaut Devolder, Dafiné Ravelosona, Claude Chappert, Weisheng Zhao | doi:10.4231/D3W37KX7D
This STT PMA MTJ model integrates the physical models of static, dynamic behaviors and reliability issues, which can be used to perform more accurate and complex reliability analysis of complex hybrid circuits before fabrication.
MIT TFET compact model including the impacts of non-idealities
2017-05-08 02:34:24 | Contributor(s): Redwan Noor Sajjad, Ujwal Radhakrishna, Dimitri Antoniadis | doi:10.4231/D3XW47X6W
We present a physics based compact model for Tunnel Field Effect Transistor (TFET), MIT TFET compact model, that captures the device physics of TFETs including non-idealities such as the interface Trap Assisted Tunneling (TAT) and intrinsic band steepness. The model matches several recent...
UCSB Graphene Nanoribbon Interconnect Compact Model
2017-05-03 21:16:20 | Contributor(s): Junkai Jiang, Kaustav Banerjee, Wei Cao | doi:10.4231/D3NK3663N
As the (local) interconnect dimension scales down to sub-20 nm, the rapidly increasing metal resistance by barrier layer and surface and grain boundary scatterings, and the diminishing current carrying capacity by self-heating and Joule-heating, the metal (Cu) interconnect cannot meet the...
Optical Ring Modulator with MIT Virtual Source ModSpec Compact Model
2017-05-03 21:19:10 | Contributor(s): Lily Weng | doi:10.4231/D3PK0732D
The optical ring modulator presented here is a vertical junction resonant
microring/disk modulator which can achieve high modulation speed, lower
power consumption, and compact size. The MIT virtual source model is a semi-empirical model describing the current and
UARK SiC Power MOSFET Model
2017-02-23 14:45:14 | Contributor(s): Mihir Mudholkar, Shamim Ahmed, Ramchandra Kotecha, Ty McNutt, Arman Ur Rashid, Tom Vrotsos, Alan Mantooth | doi:10.4231/D3QF8JK88
A compact model for SiC Power MOSFETs is presented. The model features a physical description of the channel current and internal capacitances and has been validated for dc, CV, and switching characteristics with measured data from C2M0025120D.
Compact Model of Dielectric Breakdown in Spin Transfer Torque Magnetic Tunnel Junction
2017-01-09 19:41:25 | Contributor(s): You Wang, Yue Zhang, Weisheng Zhao, Yahya Lakys, Dafine Ravelosona, Jacques-Olivier Klein, Claude Chappert, Lirida Alves de Barros Naviner, Hao Cai | doi:10.4231/D3TT4FV2X
Spin Transfer Torque Magnetic Tunnel Junction (STT-MTJ) is a promising candidate for non-volatile memories thanks to its high speed, low power, infinite endurance and easy integration with CMOS circuits. However, a relatively high current flowing through MTJ is always...
Optical Ring Modulator ModSpec Compact Model
2017-01-05 16:54:03 | Contributor(s): Lily Weng, Tianshi Wang | doi:10.4231/D31N7XN9P
The optical ring modulator presented here is a vertical junction resonant microring/disk modulator which can achieve high modulation speed, lower power consumption and compact size. A Matlab-based ModSpec compact model is developed and simulated in this project.
Flexible Transition Metal Dichalcogenide Field-Effect Transistor (TMDFET) Model
2016-05-04 03:37:43 | Contributor(s): Morteza Gholipour, Deming Chen | doi:10.4231/D3TM72243
Verilog-A model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs), considering effects when scaling the transistor size down to the 16-nm technology node. This model can be used for circuit-level simulations.
Physics-Based Compact Model for Dual-Gate Bilayer Graphene FETs
2016-04-07 19:19:34 | Contributor(s): Jorge-Daniel Aguirre Morales, Sébastien Frégonèse, Chhandak Mukherjee, Cristell Maneux, Thomas Zimmer | doi:10.4231/D30C4SM1H
A compact model for simulation of Dual-Gate Bilayer Graphene FETs based on physical equations.
Double-Clamped Silicon NEMS Resonators Model
2016-03-07 16:45:06 | Contributor(s): Yanfei Shen, Scott Calvert, Jeffrey F. Rhoads, Saeed Mohammadi | doi:10.4231/D37659G7N
Micro/Nanoelectromechanical systems (M/NEMS) are gaining great momentum and interest in a variety of
applications, such as high-sensitivity mass sensing, tunable signal filtering and precision timing. They possess
inherently high quality factors and can provide narrow bandwidth...
MVS Nanotransistor Model (Silicon)
2015-12-02 17:03:59 | Contributor(s): Shaloo Rakheja, Dimitri Antoniadis | doi:10.4231/D3RR1PN6M
The MIT Virtual Source (MVS) model is a semi-empirical compact model for nanoscale transistors that accurately describes the physics of quasi-ballistic transistors with only a few physical parameters.
MVS III-V HEMT model
2015-12-01 16:40:24 | Contributor(s): Shaloo Rakheja, Dimitri Antoniadis | doi:10.4231/D37S7HT39
The MIT Virtual Source (MVS) model is a semi-empirical compact model for nanoscale transistors that accurately describes the physics of quasi-ballistic transistors with only a few physical parameters. This model is designed for HEMT.