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Device Physics and Simulation of Silicon Nanowire Transistors
20 May 2006 | | Contributor(s):: Jing Wang
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits, many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has attracted broad attention from both the semiconductor industry...
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Exploring New Channel Materials for Nanoscale CMOS
21 May 2006 | | Contributor(s):: Anisur Rahman
The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the performance of nanoscale CMOS devices.Novel process techniques, such as ALD, high-k dielectrics,...
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Notes on the Ballistic MOSFET
08 Oct 2005 | | Contributor(s):: Mark Lundstrom
When analyzing semiconductor devices, the traditional approach is to assume that carriers scatter frequently from ionized impurities, phonons, surface roughness, etc. so that the average distance between scattering events (the so-called mean-free-path, λ) is much shorter than the device. When...
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Theory of Ballistic Nanotransistors
27 Nov 2002 | | Contributor(s):: Anisur Rahman, Jing Guo, Supriyo Datta, Mark Lundstrom
Numerical simulations are used to guide the development of a simple analytical theory for ballistic field-effect transistors. When two-dimensional electrostatic effects are small, (and when the insulator capacitance is much less than the semiconductor (quantum) capacitance), the model reduces to...
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Towards Multi-Scale Modeling of Carbon Nanotube Transistors
20 Sep 2006 | | Contributor(s):: Jing Guo, Supriyo Datta, Mark Lundstrom, M. P. Anantram
Multiscale simulation approaches are needed in order to address scientific and technological questions in the rapidly developing field of carbon nanotube electronics. In this paper, we describe an effort underway to develop a comprehensive capability for multiscale simulation of carbon nanotube...