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1. 7nm Si FinFET Models with Symmetric and Asymmetric Underlap for Circuit Simulations

   23 Aug 2013 | Contributor(s):: Arun Goud Akkala, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy

   This tarball contains Verilog-A compact lookup table models for 7nm channel length Si FinFET with different underlaps which can be used in HSPICE netlists for circuit simulations. Device simulation data for constructing the lookup table model was generated using NEMO5 atomistic...

2. A Circuit-compatible SPICE Model for Phase-field Simulations of Multi-domain Ferroelectrics

   17 May 2021 | | Contributor(s):: Chia-Sheng Hsu, Sou-Chi Chang, Dmitri Nikonov, Ian Alexander Young, Azad Naeemi

   To describe the multi-domain FE switching dynamics, we present a circuit-compatible model that can solve the time-dependent Ginzburg-Landau (TDGL) equation and Poisson’s equation self-consistently in three-dimensional space with the SPICE simulator. In addition, the FE domain structures...