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On-Chip Thermoelectric Cooling Tool

By David Alberto Saenz1, Shuaib Salamat2

1. University of Texas at El Paso 2. Purdue University

Simulates a peltier cooler embedded on a chip casing and it's thermal profile.

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Version 1.0 - published on 29 Mar 2011

doi:10.4231/D3445HC2R cite this

Open source: license | download

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See also

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Usage

World usage

Location of all "On-Chip Thermoelectric Cooling Tool" Users Since Its Posting

Simulation Users

58

4 9 12 15 16 17 19 19 20 21 21 23 23 24 25 26 30 33 36 37 42 43 45 45 49 49 49 49 51 51 52 52 54 55 56 57 58 58

Users By Organization Type
Type Users
Educational - University 43 (74.14%)
Unidentified 8 (13.79%)
Industry 4 (6.9%)
National Lab 2 (3.45%)
Educational - Unspec. Level 1 (1.72%)
Users by Country of Residence
Country Users
us UNITED STATES 29 (67.44%)
kr KOREA, REPUBLIC OF 3 (6.98%)
cn CHINA 2 (4.65%)
de GERMANY 2 (4.65%)
au AUSTRALIA 2 (4.65%)
dz ALGERIA 1 (2.33%)
fr FRANCE 1 (2.33%)
az AZERBAIJAN 1 (2.33%)
iq IRAQ 1 (2.33%)
ro ROMANIA 1 (2.33%)

Simulation Runs

712

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Overview
Average Total
Wall Clock Time 1.26 hours 28.36 days
CPU time 1.88 seconds 16.94 minutes
Interaction Time 14.29 minutes 5.38 days

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