Passive Filter Circuits

Simulation of first and second order Passive Filter circuits.

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Version 1.1 - published on 11 Oct 2014

doi:10.4231/D32Z12Q6X cite this

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Usage

World usage

Location of all "Passive Filter Circuits" Users Since Its Posting

Cumulative Simulation Users

88

4 7 9 10 11 12 12 13 17 19 20 20 21 21 22 23 23 24 24 24 25 26 27 28 28 29 29 30 30 32 33 33 33 34 35 36 36 36 36 38 39 39 39 40 40 41 41 43 44 45 46 47 47 47 47 47 48 49 49 51 51 51 52 52 55 55 55 55 56 57 57 57 58 58 59 59 60 60 60 60 61 62 63 64 64 64 64 66 66 66 66 68 69 69 69 69 70 70 71 73 74 75 76 78 78 79 83 83 83 83 84 84 84 84 85 85 85 85 85 85 85 85 85 85 87 87 88 88

Simulation Runs

244

39 46 51 52 53 54 54 56 66 72 74 76 77 77 43 44 44 45 45 45 46 47 49 50 50 51 51 52 52 60 61 61 61 63 65 81 81 81 81 108 109 109 109 112 112 113 113 131 136 139 143 144 144 144 144 144 145 146 146 153 153 153 163 163 176 176 176 176 183 188 197 197 199 199 200 200 203 203 203 203 204 205 208 210 210 210 210 212 212 212 213 216 217 217 217 217 218 218 220 222 223 224 225 227 227 228 234 234 234 234 235 235 235 235 240 240 240 240 240 240 240 240 240 240 242 242 244 244
Overview
Average Total
Wall Clock Time 1.14 hours 6.71 days
CPU time 1.41 seconds 3.32 minutes
Interaction Time 15.75 minutes 1.54 days