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Intro to MOS-Capacitor Tool

By Emmanuel Jose Ochoa1, Stella Quinones1

1. University of Texas at El Paso

Understanding the effect of silicon doping, oxide (SiO2) thickness, gate type (n+poly/p+poly), and semiconductor type (n-type/p-type) on the flatband voltage, threshold voltage, surface potential and oxide voltage of a MOS-Capacitor.

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Version 1.5 - published on 11 Aug 2014

doi:10.4231/D3BG2HB3Z cite this

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Usage

World usage

Location of all "Intro to MOS-Capacitor Tool" Users Since Its Posting

Simulation Users

161

7 16 25 31 37 40 46 52 58 69 81 84 93 98 102 104 110 118 125 138 140 145 158 160 161

Users By Organization Type
Type Users
Unidentified 81 (50.31%)
Educational - University 72 (44.72%)
Industry 6 (3.73%)
Government Agency 1 (0.62%)
National Lab 1 (0.62%)
Users by Country of Residence
Country Users
us UNITED STATES 23 (34.33%)
in INDIA 23 (34.33%)
cn CHINA 4 (5.97%)
ru RUSSIAN FEDERATION 3 (4.48%)
eg EGYPT 3 (4.48%)
bd BANGLADESH 3 (4.48%)
au AUSTRALIA 2 (2.99%)
sg SINGAPORE 2 (2.99%)
es SPAIN 2 (2.99%)
br BRAZIL 2 (2.99%)

Simulation Runs

564

132 151 171 179 190 197 210 222 233 280 350 375 447 460 468 471 489 508 541 588 483 495 553 561 564
Overview
Average Total
Wall Clock Time 5.72 hours 60.03 days
CPU time 7.19 seconds 30.21 minutes
Interaction Time 1.38 hours 14.45 days

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