ECE 695A Lecture 28: Circuit Implications of Dielectric Breakdown

By Muhammad Alam

Electrical and Computer Engineering, Purdue University, West Lafayette, IN

Published on

Abstract

Outline:

  • Part 1 - Understanding Post-BD FET behavior
    1. BD position determination
    2. Hard and Soft BD in FETs
    3. Distinguishing leakage and intrinsic FET parameters shifts
  • Part 2 - Impact of breakdown on digital circuit operation
    1. BD in ring oscillator
    2. BD in SR AM cell
    3. Timing, BD into soft node

Credits

Based on a IRPS Tutorial by Ben Kaczer

Cite this work

Researchers should cite this work as follows:

  • Muhammad Alam (2013), "ECE 695A Lecture 28: Circuit Implications of Dielectric Breakdown," https://nanohub.org/resources/17482.

    BibTex | EndNote

Time

Location

EE 226, Purdue University, West Lafayette, IN

Tags

ECE 695A Lecture 28: Circuit Implications of Dielectric Breakdown
  • Lecture 28: Circuit Implications of Dielectric Breakdown Based on a IRPS Tutorial 1. Lecture 28: Circuit Implicatio… 0
    00:00/00:00
  • copyright 2013 2. copyright 2013 72.172172172172168
    00:00/00:00
  • Outline 3. Outline 73.2399065732399
    00:00/00:00
  • Hierarchical Approach 4. Hierarchical Approach 147.21388054721388
    00:00/00:00
  • Ultra-thin gate dielectrics: they break down, but do they fail? (Weir et al., 1997) 5. Ultra-thin gate dielectrics: t… 267.90123456790127
    00:00/00:00
  • Post-BD characteristics understood through BD position 6. Post-BD characteristics unders… 511.9452786119453
    00:00/00:00
  • Refined BD position determination 7. Refined BD position determinat… 665.231898565232
    00:00/00:00
  • MEDICI modeling of post-breakdown currents 8. MEDICI modeling of post-breakd… 834.46780113446778
    00:00/00:00
  • MEDICI modeling of post-BD nFET currents in accumulation 9. MEDICI modeling of post-BD nFE… 893.29329329329335
    00:00/00:00
  • Post hard-breakdown characteristics depend strongly on breakdown position 10. Post hard-breakdown characteri… 993.5935935935936
    00:00/00:00
  • Equivalent electrical circuit for nFET after hard BD 11. Equivalent electrical circuit … 1104.9382716049383
    00:00/00:00
  • Post hard-breakdown gate currents 12. Post hard-breakdown gate curre… 1368.2349015682351
    00:00/00:00
  • Hard BD appears to strongly influence wide nFET (purely due to gate leakage) 13. Hard BD appears to strongly in… 1613.0130130130131
    00:00/00:00
  • No significant effect on FET characteristics at the moment of SBD! 14. No significant effect on FET c… 1747.9813146479814
    00:00/00:00
  • FET behavior affected by surrounding damage for gate-to-channel BD 15. FET behavior affected by surro… 1812.9462796129465
    00:00/00:00
  • Outline 16. Outline 1859.4594594594596
    00:00/00:00
  • Ring oscillator : representative of CMOS circuits in both on and stand-by states 17. Ring oscillator : representati… 1872.6059392726061
    00:00/00:00
  • After undergoing several breakdowns, the ring oscillator still functions 18. After undergoing several break… 2003.9039039039039
    00:00/00:00
  • Current jumps correlated to gate oxide BDs 19. Current jumps correlated to ga… 2114.0140140140143
    00:00/00:00
  • Half of FETs stressed during static stress 20. Half of FETs stressed during s… 2243.7437437437438
    00:00/00:00
  • Simulating effect of BD on inverter chain 21. Simulating effect of BD on inv… 2309.3093093093094
    00:00/00:00
  • Multiple BDs studied on inverted chain 22. Multiple BDs studied on invert… 2385.6523189856525
    00:00/00:00
  • How does an invert work … 23. How does an invert work … 2423.0563897230563
    00:00/00:00
  • How does an invert work … 24. How does an invert work … 2502.1354688021356
    00:00/00:00
  • How does an invert work … 25. How does an invert work … 2652.8862195528864
    00:00/00:00
  • SRAM: nFET-source BD worst case 26. SRAM: nFET-source BD worst cas… 2765.4988321654992
    00:00/00:00
  • Experimental verification : as-fabricated 27. Experimental verification : as… 2886.0860860860862
    00:00/00:00
  • Wide SRAM after HBD at nFET drain: still functional with degraded SNM 28. Wide SRAM after HBD at nFET dr… 2906.4064064064064
    00:00/00:00
  • Effect of BD on circuit timing simulated 29. Effect of BD on circuit timing… 2943.0430430430433
    00:00/00:00
  • Soft node : basis of dynamic logic, DRAM 30. Soft node : basis of dynamic l… 3022.0220220220222
    00:00/00:00
  • Post-BD retention proportional to ID, i.e. soft node leakage 31. Post-BD retention proportional… 3040.5071738405072
    00:00/00:00
  • BD in analog circuits 32. BD in analog circuits 3055.0550550550552
    00:00/00:00
  • Conclusions 33. Conclusions 3165.2652652652655
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  • Acknowledgements 34. Acknowledgements 3364.6980313646982
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