ECE 695A Lecture 28: Circuit Implications of Dielectric Breakdown
ECE 695A Lecture 28: Circuit Implications of Dielectric Breakdown
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1. Lecture 28: Circuit Implicatio…
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2. copyright 2013
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3. Outline
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4. Hierarchical Approach
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5. Ultra-thin gate dielectrics: t…
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6. Post-BD characteristics unders…
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7. Refined BD position determinat…
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8. MEDICI modeling of post-breakd…
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9. MEDICI modeling of post-BD nFE…
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10. Post hard-breakdown characteri…
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11. Equivalent electrical circuit …
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12. Post hard-breakdown gate curre…
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13. Hard BD appears to strongly in…
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14. No significant effect on FET c…
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15. FET behavior affected by surro…
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16. Outline
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17. Ring oscillator : representati…
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18. After undergoing several break…
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19. Current jumps correlated to ga…
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20. Half of FETs stressed during s…
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21. Simulating effect of BD on inv…
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22. Multiple BDs studied on invert…
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23. How does an invert work …
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24. How does an invert work …
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25. How does an invert work …
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26. SRAM: nFET-source BD worst cas…
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27. Experimental verification : as…
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28. Wide SRAM after HBD at nFET dr…
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29. Effect of BD on circuit timing…
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30. Soft node : basis of dynamic l…
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31. Post-BD retention proportional…
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32. BD in analog circuits
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33. Conclusions
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34. Acknowledgements
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