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Citations Non-affiliated (61) | Affiliated (35)
Non-affiliated authors
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J. Xiong; G. Wang; W. Mathis (2012), "The influence of Buttiker probe scattering to the port behavior of nanoscale metal-oxide-semiconductor devices," International Journal Of Circuit Theory And Applications, Wiley Online Library: pg. -. (DOI: 10.1002/cta.1805).
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E. Farzana; S. Chowdhury; R. Ahmed; M.Z.R. Khan (2012), "Analysis Of Temperature And Wave Function Penetration Effects In Nanoscale Double-gate MOSFETs," Applied Nanoscience, Springer, 2: pg. -. (DOI: 10.1007/s13204-012-0090-z).
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S. Chouhan; Y. Kumar; A. Chhipa (2012), "Comparative Study Of DG-MOSFET Modeling Based On ANFIS And NEGF," International Journal of Engineering and Innovative Technology, 1, 4: pg. 95-101.
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M. ImtiazAlamgir; A.U.H. Gulib; K.M.U. Ahmed (2012), "Performance Analysis Of Dg Mosfets With High-K Stack On Top & Bottom Gate," International Journal of Scientific & Technology Rsearch, 1, 5: pg. 96-102. 2277-8616.
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Z. Kordrostami; M.H. SHEIKHI; A. Zarifkar (2012), "DESIGN DEPENDENT CUTOFF FREQUENCY OF NANOTRANSISTORS NEAR THE ULTIMATE PERFORMANCE LIMIT," International Journal Of Modern Physics B, World Scientific, 26, 32: pg. 1250196-1-1250196-14. (DOI: 10.1142/S0217979212501962).
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D. Jain; S.K. Jaiswal; K. Verma; S. Kumar (2012), "Power Double Gate MOSFET Modeling Based On Adaptive Neuro-Fuzzy Inference System For Nano Scale Circuit Simulation," Computational Intelligence and Communication Networks CICN), 2012 Fourth International Conference on: pg. 500-505, IEEE. (DOI: 10.1109/CICN.2012.164).
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Saji Joseph; Vincent Mathew; George T (2012), "Transport Characteristics And Subthreshold Behavior Of High-K Dielectric Double Gate MOSFETs With Parallel Connected Gates," Journal Of Electron Devices, 16: pg. 1363-1369.
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J.Z. Huang; W.C. Chew; M. Tang; L. Jiang (2011), "Efficient Simulation And Analysis Of Quantum Ballistic Transport In Nanodevices With AWE," Electron Devices, IEEE Transactions On, IEEE, 59, 2: pg. 468-476. 0018-9383 . (DOI: 10.1109/TED.2011.2176130).
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A.F. Abo-Elhadeed (2011), "Modeling Ballistic Double Gate MOSFETs Using Neural Networks Approach," Electron Devices CDE), 2011 Spanish Conference on : pg. -, IEEE. 978-1-4244-7863-7 . (DOI: 10.1109/SCED.2011.5744165 ).
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Md. Ashraf; Asif Khan; Anisul Haque (2009), "Wave function penetration effects on ballistic drain current in double gate MOSFETs fabricated on 1 0 0 ) and 1 1 0) silicon surfaces," Solid-State Electronics, Elsevier, 53, 3: pg. 271-275, 02. 0038-1101. (DOI: 10.1016/j.sse.2008.12.010).
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O Kurniawan; P Bai; E Li (2009), "Ballistic calculation of NEGF in nanoscale devices using finite element method," Journal Of Physics D: Applied Physics, IOP Publishing, 42, 10: pg. 105109-, 04. (DOI: 10.1088/0022-3727/42/10/105109).
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N.-C. Tsai; Y.-R. Chiang; S.-L. Hsu (2009), "Theoretic analysis on electric conductance of nano-wire transistors," Applied Physics A: Materials Science & Processing, Springer, 98, 1: pg. 135-145, 11. 0947-8396/1432-0630. (DOI: 10.1007/s00339-009-5453-2).
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H. Uppal; I. Mitrovic; S. Hall; B. Hamilton; V. Markevich; A. Peaker (2009), "Breakdown and degradation of ultrathin Hf-based HfO)SiO) gate oxide films," Journal Of Vacuum Science And Technology B, 27, 1: pg. 443-447, 02. 0734-211X. (DOI: 10.1116/1.3025822).
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H. Iwata; T. Matsuda; T. Ohzone (2009), "Multiband simulation of quantum transport in nanoscale double-gate MOSFETs," Solid-State Electronics, Elsevier, 53, 10: pg. 1130-1134, 07. 0038-1101. (DOI: 10.1016/j.sse.2009.06.011).
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F. Djeffal; Z. Ghoggali; Z. Dibi; N. Lakhdar (2009), "Analytical analysis of nanoscale multiple gate MOSFETs including effects of hot-carrier induced interface charges," Microelectroincs Reliability, Elsevier, 49, 4: pg. 377-381, 02. 0026-2714. (DOI: 10.1016/j.microrel.2008.12.011).
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O Kurniawan; P Bai; E Li (2009), "Ballistic calculation of nonequilibrium Green's function in nanoscale devices using finite element method," Journal Of Physics D: Applied Physics, IOP Publishing, 42, 10: pg. 1-11, 04. (DOI: 10.1088/0022-3727/42/10/105109).
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D Jimenez; J. Saenz; B Iniquez; J. Sune; L.F. Marsal; J. Pallares (2009), "Unified compact model for the ballistic quantum wire and quantum well metal-oxide-semiconductor field-effect-transistor," Journal of Applied Physics, 94, 2: pg. 1061-1068, 01. (DOI: 10.1063/1.1582557).
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M. Sabbagh; Wael Fikry; O.A. Omar (2009), "Quantum compact model for ballistic double gate MOSFETs," Design & Technology of Integrated Systems in Nanoscal Era, 2009. DTIS '09. 4th International Conference on: pg. 144-146, IEEE, 05. 978-1-4244-4320-8 . (DOI: 10.1109/DTIS.2009.4938043).
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V. Lamba; D. Engles; S. Malik; M. Verma (2009), "Quantum transport in silicon double-gate MOSFET," 2nd International Workshop On Electron Devices And Semiconductor Technology, 2009: pg. 1-4, IEEE, 06. 978-1-4244-3831-0. (DOI: 10.1109/EDST.2009.5166116).
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Wael Fikry; S El Din Habeeb; Wael Manhawy (2008), "New model of ultra short symmetric double gate MOSFET," Canadian Conference On Electrical And Computer Engineering, 2008: pg. 105-109, IEEE, 07. 978-1-4244-1642-4. (DOI: 10.1109/CCECE.2008.4564504).
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Wanqiang Chen; L. Register; S.K. Banerjee (2008), "Schrodinger equation Monte Carlo in two dimensions for simulation of nanoscale metal-oxide," Journal of Applied Physics, 103, 2: pg. 24508-, 01. (DOI: 10.1063/1.2809403).
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Jian-nong Tong; Zue-chang Zou; Xu-bang Shen (2008), "Modeling quantum transport in nanoscale vertical SOI nMOSFET," Wuhan University Journal Of Natural Sciences, Springer, 9, 6: pg. 918-920, 03. (DOI: 10.1007/BF02850799).
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A. Khakifirooz (2008), "Transport Enhancement Techniques for Nanoscale MOSFETs": pg. 1-183, Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 02.
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Quentin Rafhay; Raphael Clerc; Gerard Ghibaudo; Georges Pananakakis (2008), "Impact of source-to-drain tunnelling on the scalability of arbitrary oriented alternative channel," Solid State Electronics, Elsevier, 52, 10: pg. 1474-1481, 07. (DOI: doi:10.1016/j.sse.2008.06.035).
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Keng-Ming Liu; Wanqiang Chen; L. Register; S.K. Banerjee (2008), "Schroedinger equation Monte Carlo in three dimensions for simulation of nanoscale metal-oxide of carrier transport in three-dimensional nanoscale metal oxide semiconductor field-effect transistors," Journal of Applied Physics, 104, 11: pg. -, 01. (DOI: 10.1063/1.3031303).
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I. Pappas; Gerard Ghibaudo; C.A. Dimitriadis; C. Fenouillet-Béranger (2008), "Backscattering coefficient and drift-diffusion mobility extraction in short channel MOS devices," Solid-State Electronics, Elsevier, 53, 1: pg. 54-56, 11. 0038-1101. (DOI: 10.1016/j.sse.2008.09.012).
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Mohsen Hayati; Majid Seifi; Abbas Rezaei (2008), "The Computational Intelligence in Simulation of DG MOSFET: Application to the simulation of the nanoscale CMOS circuit," Semiconductor Electronics, 2008. ICSE 2008. IEEE International Conference on: pg. 138-142, IEEE, 02. 978-1-4244-3873-0 . (DOI: 10.1109/SMELEC.2008.4770294).
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Quentin Rafhay; Raphael Clerc; Gerard Ghibaudo; Georges Pananakakis (2007), "Impact of source to drain tunneling on the lon/loff trade-off of alternative channel material MOSFETs," Semiconductor Device Research Symposium, 2007 International: pg. 1-2, 12. 978-4244-1892-3. (DOI: 10.1109/ISDRS.2007.4422479).
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Asif Khan; Md. Ashraf; Anisul Haque (2007), "Influence of Wave Function Penetration on Short Channel Effects in Nanoscae Double Gate MOSFETs," Electron Devices And Solid-state Circuits, 2007. Edssc 2007, Iee Eonference On: pg. 109-112, 12. 978-1-4244-0637-1. (DOI: 10.1109/EDSSC.2007.4450074).
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Biswajit Ray; K. Shubhakar; S. Mahapatra (2007), "Necessity for Quantum Mechanical Simulation for the Future Technology Nodes," Physics Of Semiconductor Devices, 2007. IWPSD 2007. International Workshop On: pg. 880-883, 12. 978-1-4244-1728-5. (DOI: 10.1109/IWPSD.2007.4472662).
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Rhonda Myers-Riggs (2007), "Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport": pg. -, University of Cincinnati, 10.
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S. Mehrotra (2007), "A Simulation Study of Silicon Nanowire Field Effect Transistors FETs)": pg. -, University of Cincinnati, 02.
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Yasser Sabry; T.M. Abdolkader; Wael Farouk (2007), "Uncoupled Mode-Space Simulation Validity for Double-Gate MOSFETs," International Conference On Microelectronics, 2007: pg. 351-354, IEEE, 12. 978-1-4244-1846-6 \print). (DOI: 10.1109/ICM.2007.4497727).
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T.M. Abdolkader (2007), "A new approach for numerical simulation of quantum transport in double-gate SOI," International Journal Of Numerical Modelling: Electronic Networks, Devices And Fields, Wiley Online Library, 20, 6: pg. 299-309, 03. (DOI: 10.1002/jnm.647).
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Alexander Klös (2006), "Nanotechnologie in der Elektronik: Ein Ausblick auf die Bauelemente der Zukunft," Fachtagung Sensorik - Messtechnik - Technologien 2006, Wetzlar: pg. -, 02.
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S. Balasubramanian (2006), "Nanoscale thin-body MOSFET design and applications": pg. 1-185, University of California at Berkeley, 10.
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M Anguita; E Ros; J Bernier; J. Fernandez (2006), "SCE Toolboxes for the Development of High-Level Parallel Applications," Computational Science - ICCS 2006 6th International Conference, Reading, UK, May 28-31, 2006. Proceedings, Part II, Springer, 3992: pg. 518-525, 05. 0302-9743. (DOI: 10.1007/11758525_70).
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T.M. Abdolkader; M. Fathi; Wael Fikry; O.A. Omar (2005), "FETMOSS: a software tool for 2D simulation of double-gate MOSFET," Enabling Technologies For The New Knowledge Society: Iti 3rd International Conference On Information And Communications Technology, 2005, Wiley Online Library: pg. 193-208, IEEE, 12. 0-7803-9270-1. (DOI: 10.1109/ITICT.2005.1609624).
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H.A. Hamid; B Iniquez; D Jimenez; L.F. Marsal; J. Pallares (2005), "Double gate MOSFET compact model including scattering," Electron Devices, 2005 Spanish Conference On, 49, 3: pg. 413-417, 02. 0-7803-8810-0. (DOI: 10.1109/SCED.2005.1504418 ).
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A. Akturk; N. Goldsman; G. Metze (2005), "Self-consistent modeling of heating and MOSFET performance in 3-D integrated circuits," Electron Devices, IEEE Transactions on, IEEE, 52, 11: pg. 2395-2403, 11. (DOI: 10.1109/TED.2005.857187).
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H. Iwata; T. Matsuda; T. Ohzone (2005), "Influence of image and exchange-correlation effects on electron transport in nanoscale DG MOSFETs," Electron Devices, IEEE Transactions on, IEEE, 52, 7: pg. 1596-1602, 07. (DOI: 10.1109/TED.2005.850947).
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S. Xiong; J. Bokor (2005), "Structural optimization of SUTBDG devices for low-power applications," Electron Devices, IEEE Transactions on, IEEE, 52, 3: pg. 360-366, 03. (DOI: 10.1109/TED.2005.843869).
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Shaikh Ahmed; Christian Ringhofer; D. Vasileska (2005), "Efficacy of the Thermalized Effective Potential Approach for Modeling Nano-Devices," Simulation Of Semiconductor Processes And Devices, 2005. SISPAD 2005. International Conference On: pg. 251-254, IEEE, 09. 4-9902762-0-5 . (DOI: 10.1109/SISPAD.2005.201520).
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M. Zhao; V. Chadha; R.J. Figueiredo (2005), "Supporting application-tailored grid file system sessions with WSRF-based services," High Performance Distributed Computing, 2005. HPDC-14. Proceedings. 14th IEEE International Symposium On: pg. 24-33, IEEE, 07. 0-7803-9037-7. (DOI: 10.1109/HPDC.2005.1520930).
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T. Xia (2005), "Simulation Study of Deep Sub-Micron and Nanoscale Semiconductor Transistors," The University of Texas at Austin: pg. 1-148, University of Texas at Austin, 05.
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Xue Shao; Zhipeng Yu (2005), "Nanoscale FinFET simulation: A quasi-3D quantum mechanical model using NEGF," Solid-State Electronics, Elsevier, 49, 8: pg. 1435-1445, 08. (DOI: 10.1016/j.sse.2005.04.017).
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D. Vasileska; H Khan; Shaikh Ahmed; Christian Ringhofer; C. Heitzinger (2005), "Quantum and Coulomb effects in nanodevices," International Journal Of Nanoscience, 4, 3: pg. 305-361, 04.
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J. Fonseca; S. Kaya (2004), "Accurate treatment of interface roughness in nanoscale DG MOSFETs using non-equilibrium Green's functions," Solid-State Electronics, Elsevier, 48, 32767: pg. 1843-1847, 06. 0038-1101. (DOI: 10.1016/j.sse.2004.05.024).
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P. Graham; M. Gokhale (2004), "Nanocomputing in the presence of defects and faults: a survey," Nano, Quantum And Molecular Computing: Implications To High Level Design And Validation, Kluwer Academic Publishers: pg. 39-67, 06. 1-4020-8067-0.
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S.E. Laux (2004), "Arbitrary crystallographic orientation in QDAME with Ge 7.5 nm DGFET examples," Journal of Computational Electronics, Springer, 3, 3: pg. 379-385, 10. (DOI: 10.1007/s10825-004-7081-6).
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T. Xia; L. Register; S.K. Banerjee (2004), "Quantum Transport in Carbon Nanotube Transistors: Complex Band Structure Effects," Journal of Applied Physics, AIP, 95, 3: pg. 1597-1599, 02. 0021-8979. (DOI: 10.1063/1.1631747).
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T.M. Abdolkader; Wael Fikry (2004), "Semi-Empirical quantum correction model for electron concentration in symmetric double gate mosfets," 2004 International Conference on Electrical, Electronic and Computer Engineering ICEEC?O4: pg. 549-552, IEEE, 09. 0-7803-8575-6 . (DOI: 10.1109/ICEEC.2004.1374527 ).
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D Jimenez; B Iniquez; J. Sune; J.J. Saenz (2004), "Analog performance of the nanoscale double-gate metal-oxide-semiconductor field-effect-transistor near the ultimate scaling limits," Journal of Applied Physics, AIP, 96, 9: pg. 5271-5276, 11. (DOI: 10.1063/1.1778485).
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J. Fonseca; S. Kaya (2003), "Simulation of interface roughness in DG-MOSFETs using non-equilibrium Green's functions," NT, Elsevier: pg. 512-513, IEEE, 12.
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P. Beckett (2003), "Exploiting Multiple Functionality for Nano-Scale Reconfigurable Systems," Great Lakes Symposium On VLSI: pg. 50-55, ACM, 04. 1-58113-677-3.
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S. Balasubramanian; L. Chang; B. Nikolic; Tsu-Jae King (2003), "Circuit-Performance Implications for Double-Gate MOSFET Scaling Below 25nm," 2003 Silicon Nanoelectronics Workshop: pg. -, 06.
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T. Low; Y.T. Hou; M.F. Li; Chunxiang Zhu; A. Chin; Ganesh Samudra; L. Chan; D.-L. Kwong (2003), "Investigation of Performance Limits of Germanium Double-Gated MOSFETs," IEEE International Electron Devices Meeting, 2003. IEDM : pg. 29.4.1-29.4.4, IEEE, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269374).
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D Jimenez; J.J. Saenz; B Iniquez; J. Sune; L.F. Marsal; J. Pallares (2003), "Compact modeling of nanoscale MOSFETs in the ballistic limit," European Solid-State Device Research, 2003. 33rd Conference on. ESSDERC , IEEE: pg. 187-190, IEEE, 09. 0-7803-7999-4. (DOI: 10.1109/ESSDERC.2003.1256842).
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Vlado Stankovski; Ziga Turk; Tomo Cerovsek (2003), "D24: Guide for tools and services delivery," Citeseer: pg. -, ICCI, 12.
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Alberto Prieto; Javier Fernandez; Antonio Canas; Antonio Diaz; Jesus Gonzalez; Julio Ortega (2002), "Performance of Message-Passing MATLAB Toolboxes," High Performance Computing For Computational Science--VECPAR 2002, Springer: pg. 228-242, 06. 978-3-540-00852-1. (DOI: 10.1007/3-540-36569-9_14).
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E. Pop; Sanjiv Sinha; K.E. Goodson (2002), "Monte Carlo Modeling of Heat Generation in Electronic Nanostructures," Proceedings Of The IMECE 02 2002 ASME International Mechanical Engineering Congress and Exposition: pg. 1-6, 11.
Affiliated authors
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H.S. Pal; Dmitri Nikonov; R. Kim; Mark Lundstrom (2012), "Electron-Phonon Scattering In Planar MOSFETs: NEGF And Monte Carlo Methods": pg. 1-30.
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Yunfei Gao; T. Low; Mark Lundstrom; Dmitri Nikonov (2010), "Simulation of the Spin Field Effect Transistors: Effects of Tunneling and Spin Relaxation on its Performance," Journal of Applied Physics, 108, 8: pg. 083702-1-083702-10, 02. 1089-7550. (DOI: 10.1063/1.3496666).
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Mark Lundstrom; Yang Liu (2009), "Simulation-Based Study of III-V HEMTs Device Physics for High-Speed Low-Power Logic Applications," 215th ECS Meeting/The Electrochemical Society: pg. 1-1, The Electrochemical Society, 05.
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N. Neophytou; Titash Rakshit; Mark Lundstrom (2009), "Performance Analysis of 60-nm Gate-Length III-V InGaAs HEMTs: Simulations Versus Experiments," IEEE Transactions on Electron Devices, IEEE, 56, 7: pg. 1377-1387, 06. 0018-9383. (DOI: 10.1109/TED.2009.2021437).
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Himadri Pal; T. Low; Mark Lundstrom (2009), "NEGF analysis of InGaAs Schottky barrier double gate MOSFETs," Electron Devices Meeting, 2008. IEDM 2008. IEEE International: pg. 1-4, Ieee, 02. 978-1-4244-2377-4 . (DOI: 10.1109/IEDM.2008.4796843).
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H.S. Pal; K.D. Cantley; Shaikh Ahmed; Mark Lundstrom (2008), "Influence of bandstructure and channel structure on the inversion layer capacitance of silicon and GaAs MOSFETs," IEEE Transactions on Electron Devices, IEEE, 55, 3: pg. 904-908, 03. (DOI: 10.1109/TED.2007.914830).
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Yang Liu; N. Neophytou; G Klimeck; Mark Lundstrom (2008), "Band Structure Effects on the Performance of III-V Ultra-thin-body SOI MOSFETs," IEEE Transactions on Electron Devices, 55, 5: pg. 1116-1122, 05. 0018-9383. (DOI: 10.1109/TED.2008.919290).
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G Klimeck; Michael McLennan; Mark Lundstrom; George Adams III (2008), "nanoHUB.org - online simulation and more materials for semiconductors and nanoelectronics in education and research," 8th Ieee Conference On Nanotechnology, 2008. Nano : pg. 401-404, IEEE, 08.
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Shaikh Ahmed; G Klimeck; D. Kearney; Michael McLennan; M.P. Anantram (2007), "Quantum Simulations of Dual Gate MOSFET Devices: Building and Deploying Community Nanotechnology Software Tools on nanoHUB.org," International Journal Of High Speed Electronics And Systems, World Scientific Publishing Company, 17, 3: pg. 485-494, 09. (DOI: 10.1142/S0129156407004679).
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K.D. Cantley; Y. Liu; H.S. Pal; T. Low; Shaikh Ahmed; Mark Lundstrom (2007), "Performance Analysis of III-V Materials in a Double-Gate nano-MOSFET," Electron Devices Meeting, 2007, IEDM 2007, IEEE International: pg. 113-116, IEEE, 12. 978-1-4244-1508-3. (DOI: 10.1109/IEDM.2007.4418877).
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Nauman Butt; Muhammad Alam (2007), "Scaling Limits of Capacitorless Double Gate DRAM Cell," 2006 International Conference On Simulation Of Semiconductor Processes And Devices: pg. 302-305, IEEE, 01. 1-4244-0404-5 . (DOI: 10.1109/SISPAD.2006.282896).
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Deepanjan Datta; Samiran Ganguly; S Dasgupta (2007), "Low band-to-band tunelling and gate tunnelling current in novel nanoscale double-gate architecture: simulations and investigation," Nanotechnology, 18: pg. 1-9, 04. (DOI: 10.1088/0957-4484/18/21/215201).
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M. Zhao; R.J. Figueiredo (2006), "Application-Tailored Cache Consistency for Wide-Area File Systems," Distributed Computing Systems, 2006. Icdcs 2006. 26th Ieee International Conference On: pg. 41-, IEEE, 07. 0-7695-2540-7. (DOI: 10.1109/ICDCS.2006.17).
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H. Ananthan; K. Roy (2006), "A Compact Physical Model for Yield Under Gate Length and Body Thickness Variations in Nanoscale Double-Gate CMOS," Electron Devices, IEEE Transactions on, IEEE, 53, 9: pg. 2151-2159, 09. (DOI: 10.1109/TED.2006.880365).
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Mark Lundstrom; G Klimeck (2006), "The NCN: Science, Simulation, and Cyber Services," Emerging Technologies - Nanoelectronics, 2006 Ieee Conference On: pg. 496-500, IEEE, 01. 0-7803-9357-0. (DOI: 10.1109/NANOEL.2006.1609779).
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Mark Lundstrom (2006), "Nanotransistors: A Bottom-Up View," Proceeding Of The 36th European Solid-state Device Research Conference: pg. 33-40, IEEE, 09. 1-4244-0301-4. (DOI: 10.1109/ESSDER.2006.307633).
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A. Rahman; Mark Lundstrom; Avik Ghosh (2005), "Generalized effective-mass approach for n-type metal-oxide-semiconductor field-effect transistors on arbitrarily oriented wafers," Journal of Applied Physics, AIP, 97, 5: pg. 0-0, 02. (DOI: 10.1063/1.1845586).
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R. Ravishankar; G. Kathawala; U. Ravaioli; S. Hasan; Mark Lundstrom (2005), "Comparison of Monte Carlo and NEGF simulations of double gate MOSFETs," Journal of Computational Electronics, Springer, 4, 1: pg. 39-43, 04. (DOI: 10.1007/s10825-005-7104-y).
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J.A.B. Fortes; R.J. Figueiredo; Mark Lundstrom (2005), "Virtual computing infrastructures for nanoelectronics simulation," Proceedings Of The IEEE, IEEE, 93, 10: pg. 1839-1847, 10. (DOI: 10.1109/JPROC.2005.853545).
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A. Rahman; G Klimeck; Mark Lundstrom (2005), "Novel channel materials for ballistic nanoscale MOSFETs-bandstructure effects," Electron Devices Meeting, 2005. Iedm Technical Digest. Ieee International: pg. 604-, IEEE, 12. (DOI: 10.1109/IEDM.2005.1609421).
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J. Wang (2005), "Device Physics and Simulation of Silicon Nanowire Transistors": pg. 1-149, Purdue University, 08.
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Sayed Hasan; J. Wang; Mark Lundstrom (2004), "Device design and manufacturing issues for 10 nm-scale MOSFETs: a computational study," Solid State Electronics, Elsevier, 48, 6: pg. 867-875, 06. (DOI: 10.1016/j.sse.2003.12.022).
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S. Adabala; V. Chadha; Puneet Chawla; R.J. Figueiredo; J.A.B. Fortes; Ivan Krsul; A. Matsunaga; M. Tsugawa; Jian Zhang; M. Zhao; L. Zhu; Xiaomin Zhu (2004), "From virtualized resources to virtual computing grids: the In-VIGO system," Future Generation Computer Systems, Elsevier, 21, 6: pg. 896-909, 02. (DOI: 10.1016/j.future.2003.12.021).
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A. Rahman; Mark Lundstrom; Avik Ghosh (2004), "Effective Mass Approach for n-MOSFETs on Arbitrarily Oriented Wafers," Journal of Computational Electronics, Springer, 3, 3: pg. 281-284, 10. 0-7803-8649-3 . (DOI: 10.1007/s10825-004-7062-9).
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Mark Lundstrom (2003), "Device physics at the scaling limit: what matters? [MOSFETs]," Electron Devices Meeting, 2003. IEDM: pg. 33.1.1-33.1.4, IEEE, 12.
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Z. Ren; R. Venugopal; Sebastian Goasguen; S. Datta; Mark Lundstrom (2003), "nanoMOS 2.5: A two-dimensional simulator for quantum transport in double-gate MOSFETs," IEEE Transactions on Electron Devices, IEEE, 50, 9: pg. 1914-1925, 09. 0018-9383. (DOI: 10.1109/TED.2003.816524).
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A. Rahman; Jihua Guo; S. Datta; Mark Lundstrom (2003), "Theory of ballistic nanotransistors," Electron Devices, IEEE Transactions on, IEEE, 50, 9: pg. 1853-1864, 09. (DOI: 10.1109/TED.2003.815366).
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Sebastian Goasguen; R. Venugopal; Mark Lundstrom (2003), "Modeling transport in nanoscale silicon and molecular devices on parallel machines," Nanotechnology, 2003. Ieee-nano 2003. 2003 Third Ieee Conference On, 2: pg. 398-401, IEEE, 08. 0-7803-7976-4. (DOI: 10.1109/NANO.2003.1231802).
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A. Rahman; Avik Ghosh; Mark Lundstrom (2003), "Assessment of Ge n-MOSFETs by quantum simulation," Electron Devices Meeting, 2003. IEDM: pg. 19.4.3-19.4.4, IEEE, 12. (DOI: 10.1109/IEDM.2003.1269324).
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J. Wang; E. Polizzi; Mark Lundstrom (2003), "A computational study of ballistic silicon nanowire transistors," Electron Devices Meeting, 2003. IEDM: pg. 29.5.1-29.5.4, IEEE, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269375).
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Sebastian Goasguen; A.R. Butt; K.D. Colby; Mark Lundstrom (2002), "Parallelization of the nanoscale device simulator nanoMOS-2.0 using a 100 nodes linux cluster," Nanotechnology, 2002. IEEE-Nano 2002. Proceedings Of The 2002 2nd IEEE Conference On: pg. 409-412, IEEE, 08. 0-7803-7538-6.
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C.D. Parikh; Mark Lundstrom (2002), "Electron transport in nanoscale bipolar transistors," 2002 2nd IEEE Conference On Nanotechnology: pg. 103-106, IEEE, 08.
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Mark Lundstrom; X. Ren (2002), "Essential physics of carrier transport in nanoscale MOSFETs," Electron Devices, IEEE Transactions on, IEEE, 49, 1: pg. 133-141, 01. (DOI: 10.1109/16.974760).
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Z. Ren; R. Venugopal; S. Datta; Mark Lundstrom (2001), "Examination of design and manufacturing issues in a 10 nm double gate MOSFET using nonequilibrium Green's function simulation," Electron Devices Meeting, 2001. IEDM Technical Digest. International: pg. 541-544, IEEE, 12. 0-7803-7050-3 . (DOI: 10.1109/IEDM.2001.979435 ).
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David Rumsey (2001), "Electrical Characterization of Bulk MOSFETs in Terms of Backscattering Coefficients": pg. 1-67, Purdue University, 12.