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A Memristor and Memristive Systems Symposium Friday, November 21 9:00 a.m.- 4:30 p.m.
Sibley Auditorium, UC Berkeley
Scholars, scientists, engineers and students are welcome to join UC Merced and UC Berkeley for "A Memristor and Memristive Systems Symposium," which will explore the potential of memristors and memristive systems as they advance state of the art nano-electronic circuits. The event is co-sponsored by UC Merced and UC Berkeley in cooperation with the Semiconductor Industry Association (SIA) and funded by the National Science Foundation.
Admission is free with registration. The complete program, list of speakers, and registration is at: http://memristor.ucmerced.edu/
On November 21, 2008 UC Merced and UC Berkeley will be hosting a symposium on memristor and memristive systems. Experts will discuss scientific principles, experimental findings, and potential exploration of related topics. The importance of this field initially pioneered by Leon O. Chua in 1971and by Leon Chua and Sung-Mo Kang in 1976 was reaffirmed recently by unveiling of a two-terminal nanoscale device presented in Nature by Stanley Williams and his collaborators at HP Labs. Potential development of more compact low power memory chips and realization of neuromorphic computing hardware among other possibilities has been suggested by the most recent experimental results. This symposium will potentially help accelerate significant progresses in this newly emerging field.
In 1971, Leon O. Chua published a seminal paper on the missing basic circuit element that defines the constitutive relationship between electrical charge q and flux linkage φ [1]. He argued that this element
was as fundamental as the other three basic passive elements: resistor, inductor and capacitor. Chua demonstrated that the memristor can be physically mimicked by using other passive and active circuit elements, but at that time no physical entity was identified as being a memristor. In1976, Leon O. Chua and Sung-Mo Kang published a paper that described a large class of devices and systems they called memristive devices and systems [2], which broadened the scope of useful dynamical electrical
devices substantially. However, no one was able to intentionally build a physical memristor or memristive device, nor to describe the operating physics of such a device. Just recently, Stan Williams and his research team at HP Labs unveiled a two-terminal titanium dioxide nanoscale device in Nature that exhibited memristor characteristics in a restricted operating range and memristive characteristics for a wider range of operating parameters [3]. Many mysterious i-v anomalies in the literature
of the last half century can be explained with memristive system models. In particular, observations of multiple conductance states, switching and hysteretic conductance, and apparent negative differential resistance can now all be seen to be consistent with memristive behavior.
The physical presence of memristance and memristive behavior has emerged more visibly in nanoscale devices, where high fields that result from applying a few volts over nanometer length scales induce highly nonlinear and reversible ionic transport mechanisms in semiconductors [3]. It is conceivable that new approaches for nonlinear electronics can be developed by creating hybrid transistor/memristor CMOS chips. Some tantalizing applications have been mentioned by the Williams team, including nonvolatile random access memory. Indeed, there is already a world-wide effort to create new memories based on resistance changes induced by ionic motion in various materials [4-7]; however, it was not recognized that the switches being developed by laboratories in Germany, Japan, Korea and elsewhere were actually memristive devices. Because the researchers did not understand the dynamical nature of their devices nor did they have the mathematical foundations for properly designing circuits, progress in this area has been slow [8].
Another area in which memristive devices provide a tremendous advantage is in neuromorphic computing, for which a network learns from repeated stimuli of connections between the nodes of the system. It was already pointed out by Chua and Kang [2] that synapses have memristive
properties, so if one wishes to build an electronic neuromorphic or analog computer based on synaptic properties, then the fundamental 'gate' of such a system would be a memristor. Neuromorphic hardware has had very limited success to date for one primary reason: the lack of a small, cheap circuit that can emulate the essential properties of a synapse. Brains require synapses, and lots of them (an estimated 1014 for the human brain), but only about 1/10000 as many neurons, so synapse circuit design
completely dominates the implementation problem. Boahen has built synapses using 120 nm subthreshold CMOS [9], but the area of each synapse is about the same as a neuron, thus limiting neuron density to a
few thousand per chip. A single memristor is a tiny fraction (1/10000) of the size of any CMOS-only representation of a synapse, and moreover is a non-volatile passive device, and thus requires very little power to operate. Memristors may make neuromorphic computing possible.
Finally, there are a number of nanocomputing architectures based on "crossbar structures", which are a set of parallel wires crossing over another set of parallel wires at right angles, with each wire in one layer connected to every wire of the other layer by a switch [10]. These architectures have been proposed primarily because of their regularity and in principle ease of fabrication to be able to extend electronic circuits into the single-digit nanometer scale. The switches needed for connecting pairs of wires in a crossbar and enabling the desired architectures are memristors.
The symposium on memristor and memristive systems and related fields will discuss scientific principles, experimental findings, and potential exploration of related topics. The symposium will be an open forum for in-depth dialogs, scientific discussions and potential future collaborative efforts.
REFERENCES CITED
[1]. Chua, L. O., "Memristor- The missing circuit element," IEEE Trans. On Circuit Theory
CT-18, pp. 507-519, 1971.
[2]. Chua, L. O. and Kang, S. M., "Memristive devices and systems," Proc. of the IEEE, 64,
pp. 209-223, 1976.
[3]. Strukov, D, Snider, G. S., Stewart, D. R., Williams, R. S., "The missing memristor found,"
Nature, 453, pp. 80-83, May 1, 2008.
[4]. Waser, R. and Aono, M., "Nanoionics-based resistive switching memories," NatureMatter.
6, pp. 833-840, 2007.
[5]. A. Chen, S. Haddad, Y.-C. Wu, T.-N. Fang, Z. Lan, S. Avanzino, S. Pangrle, M. Buynoski,
M. Rathor, W. Cai, N. Tripsas, C. Bill, M. VanBuskirk, and M. Taguchi, "Nonvolatile resistive
switching for advanced memory applications," in IEDM?05 Tech. Digest, rept. 31.4. pp. 386-391,
Jan. 2008.
[6]. S. H. Jo and W. Lu, "CMOS Compatible Nanoscale Nonvolatile Resistance Switching Memory,"
Nano Lett., 8, pp. 392-397, 2008.
[7]. A. Beck, J. G. Bednorz, Ch. Gerber, C. Rossel, and D. Widmer, "Reproducible switching
effect in thin oxide films for memory applications," Appl. Phys. Lett. 77, 139, 2000.
[8] Chua, L. O., "Nonlinear circuit foundations for nanodevices," Proc. of the IEEE,vol. 91,
no. ll, pp.1830-1859, 2003.
[9]. Merolla, P.A., Arthur, J.V., Shi, B.E., and Boahen, K.A., "Expandable networks for neuromorphic
chips," IEEE Transactions on Circuits and Systems I: Regular Papers 54, pp. 301-311, 2007.
[10]. Likharev, K. K., "CMOL: Second life for silicon?," Microelectronics Journal 39, pp.
177-183, 2008. |