Flexible Hybrid Analog and Digital Computers

By Richard Wunderlich

Georgia Institute of Technology, Atlanta, GA

Published on

Abstract

Koomey's Law of the computation efficiency of digital systems over time is a natural extension of Moore's Law. That is, that using smaller transistors tends to decrease the energy per computation of these sytems. And while human ingenuity continues to find ways of building smaller and smaller transistors, these transistors are becoming less and less predictable, such that digital designers are having a harder and harder time of figuring out how to build reliable systems while using them. So while no real system can sustain exponential growth forever, Moore's Law appears to still be holding while Koomey's is not.

It is estimated that the human brain is still somewhere on the order of five orders of magnitude more efficient at solving problems than our current best digital systems. And with the slowing down of Koomey's Law, we may never reach that efficiency with digital computers alone. Thus, there is a strong motivation to explore alternative types of computation. Analog computers are incredibly efficient when precision requirements are low, while digital computers tend to win when precision requirements are high. The adaptability of neuromorphic and asynchronous digital computers allow them to efficiently utilize unreliable parts.

To build the most efficient computers of the future, it is likely one will need to leverage many different computational domains depending on the problem at hand. This presentation covers reconfigurable, hybrid computers and core technologies built to explore this idea.

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Researchers should cite this work as follows:

  • Richard Wunderlich (2014), "Flexible Hybrid Analog and Digital Computers," https://nanohub.org/resources/20345.

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Location

203 Physics, Purdue Universtiy, West Lafayette, IN

Flexible Hybrid Analog and Digital Computers
  • Flexible, Hybrid Analog and Digital Computers 1. Flexible, Hybrid Analog and Di… 0
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  • Digital Computer Efficiency Scaling 2. Digital Computer Efficiency Sc… 111.51151151151152
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  • Traditional Digital Scaling 3. Traditional Digital Scaling 184.05071738405073
    00:00/00:00
  • Synchronous Digital Circuits 4. Synchronous Digital Circuits 414.78144811478148
    00:00/00:00
  • Example Sources of Variation 5. Example Sources of Variation 684.21755088421753
    00:00/00:00
  • What about Biological Computers? 6. What about Biological Computer… 790.39039039039039
    00:00/00:00
  • Example of Digital Computation 7. Example of Digital Computation 1000.5338672005339
    00:00/00:00
  • Example of Digital Computation 8. Example of Digital Computation 1122.9562896229563
    00:00/00:00
  • Example of Analog Computation 9. Example of Analog Computation 1182.1488154821489
    00:00/00:00
  • Analog VS Digital 10. Analog VS Digital 1408.6086086086086
    00:00/00:00
  • Analog vs. Digital 11. Analog vs. Digital 1567.9346012679346
    00:00/00:00
  • Hybrid Systems 12. Hybrid Systems 1671.7384050717385
    00:00/00:00
  • Energy Efficient Computing 13. Energy Efficient Computing 1857.4574574574576
    00:00/00:00
  • Floating-Gate (FG) Transistor 14. Floating-Gate (FG) Transistor 1892.8595261928597
    00:00/00:00
  • SRAM vs. FG Switch 15. SRAM vs. FG Switch 2065.2318985652319
    00:00/00:00
  • Floating-Gate Switch Programming 16. Floating-Gate Switch Programmi… 2178.5785785785788
    00:00/00:00
  • Capacitively-Coupled Floating-Gate Logic 17. Capacitively-Coupled Floating-… 2210.5105105105108
    00:00/00:00
  • FG Analog Vector Matrix Multiplier (VMM) 18. FG Analog Vector Matrix Multip… 2278.2115448782115
    00:00/00:00
  • FPAADD 19. FPAADD 2374.0073406740075
    00:00/00:00
  • FPAADD 20. FPAADD 2502.4357691024356
    00:00/00:00
  • Mixed-Signal Applications 21. Mixed-Signal Applications 2556.3563563563566
    00:00/00:00
  • RASP3.0 Architecture 22. RASP3.0 Architecture 2640.5405405405409
    00:00/00:00
  • The RASP 3.0 Chip 23. The RASP 3.0 Chip 2728.2282282282285
    00:00/00:00