Tunnel FET Compact Model

By Hesameddin Ilatikhameneh1, Tarek Ahmed Ameen (editor)1, Fan Chen (editor)1, Ramon Salazar1, Gerhard Klimeck1, Joerg Appenzeller1, Rajib Rahman1

1. Purdue University

Model Tunnel FETs based on analytic modeling and WKB method

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Version 1.0 - published on 24 Aug 2016

doi:10.4231/D36D5PC3P cite this

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Usage

World usage

Location of all "Tunnel FET Compact Model" Users Since Its Posting

Simulation Users

92

5 12 19 31 35 42 43 49 61 63 68 72 76 77 81 81 85 90 92

Users By Organization Type
Type Users
Unidentified 63 (68.48%)
Educational - University 28 (30.43%)
Industry 1 (1.09%)
Users by Country of Residence
Country Users
us UNITED STATES 8 (30.77%)
in INDIA 8 (30.77%)
ve VENEZUELA, BOLIVARIAN REPUBLIC OF 3 (11.54%)
iq IRAQ 1 (3.85%)
ro ROMANIA 1 (3.85%)
de GERMANY 1 (3.85%)
es SPAIN 1 (3.85%)
pk PAKISTAN 1 (3.85%)
bd BANGLADESH 1 (3.85%)
ru RUSSIAN FEDERATION 1 (3.85%)

Simulation Runs

1,107

13 45 121 230 354 393 434 522 636 653 698 717 745 781 820 923 961 1075 1107
Overview
Average Total
Wall Clock Time 1.33 hours 42.65 days
CPU time 34.13 seconds 7.3 hours
Interaction Time 31.23 minutes 16.7 days