Tunnel FET Compact Model

By Hesameddin Ilatikhameneh1, Tarek Ahmed Ameen (editor)1, Fan Chen (editor)1, Ramon Salazar1, Gerhard Klimeck1, Joerg Appenzeller1, Rajib Rahman1

1. Purdue University

Model Tunnel FETs based on analytic modeling and WKB method

Launch Tool

You must login before you can run this tool.

Version 1.0 - published on 24 Aug 2016

doi:10.4231/D36D5PC3P cite this

View All Supporting Documents

Usage

World usage

Location of all "Tunnel FET Compact Model" Users Since Its Posting

Simulation Users

108

5 12 19 31 35 42 43 49 61 63 68 72 76 77 81 81 85 90 93 97 106 107 108

Users By Organization Type
Type Users
Unidentified 76 (70.37%)
Educational - University 31 (28.7%)
Industry 1 (0.93%)
Users by Country of Residence
Country Users
us UNITED STATES 9 (33.33%)
in INDIA 8 (29.63%)
ve VENEZUELA, BOLIVARIAN REPUBLIC OF 3 (11.11%)
ie IRELAND 1 (3.7%)
iq IRAQ 1 (3.7%)
bd BANGLADESH 1 (3.7%)
ro ROMANIA 1 (3.7%)
de GERMANY 1 (3.7%)
tr TURKEY 1 (3.7%)
es SPAIN 1 (3.7%)

Simulation Runs

1,372

13 45 121 230 354 393 434 522 636 653 698 717 745 781 820 923 961 1075 1110 1129 1296 1314 1372
Overview
Average Total
Wall Clock Time 1.18 hours 48.08 days
CPU time 34.84 seconds 9.47 hours
Interaction Time 28.39 minutes 19.3 days