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Today’s integrated circuits (ICs) and systems are at greater risk during design, fabrication, test, and post-deployment stages than ever before. Semiconductor globalization and outsourcing facilitates intellectual property (IP) piracy, insertion of malicious circuits (i.e., hardware Trojans), and illegal manufacturing of ICs (i.e., overproduction). Further, with advances in the capabilities/automation of failure analysis (FA) tools/software, it is becoming easier to reverse engineer critical IP, extract proprietary secrets, and launch attacks against critical missions and infrastructure. These are serious issues for government, industry, and society. Hardware obfuscation consists of techniques that lock and/or conceal the intent of underlying semiconductor IP in order to hinder these threats. In this presentation, the following topics will be covered: (1) Overview of the IC design flow and threat models; (2) Summary of naïve protection approaches and their limitations; (3) Introduction to hardware obfuscation variants, applications/use cases, popular metrics, and other considerations; and (4) Introduction to non-invasive, invasive, and semi-invasive attacks on hardware obfuscation.

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I am currently an Associate Professor and the Steven A. Yatauro Faculty Fellow in the Electrical and Computer Engineering (ECE) Department at the University of Florida. Previously, I was an Assistant Professor in the Electrical and Computer Engineering (ECE) Department at the University of Connecticut. I received my PhD in Electrical and Computer Engineering from the University of Maryland in 2013. My current research focuses on:

1. Counterfeit Electronics Detection and Avoidance
2. Hardware Security Primitives
3. Hardware Trojan Detection and Prevention
4. Nanoscale Integration Challenges
5. Reverse Engineering and Anti-reverse Engineering
6. Computer-Aided Design (CAD) Tools, Metrics, and Rules for Hardware Security
7. Biometric Authentication

Past projects of mine include Dynamic Energy and Thermal management in Distributed Systems and Green Computing in Large-Scale Datacenters.

National Microelectronics Security Training Center (MEST).

Researchers should cite this work as follows:

• Dominic Forte (2024), "W03 - Introduction to Hardware Obfuscation," https://nanohub.org/resources/40016.

  BibTex | EndNote

1. MEST
2. supply chain
3. supply chain security