Access: To obtain access to this tool, please request membership into this group: https://nanohub.org/groups/synopsyspurdue

Synopsys digital design contains a suite of Synopsys electronic design automation (EDA) tools focusing on developing silicon digital designs and verifying their behavior. 

This tool includes PrimeTime, Fusion Compiler, and Synthesis (Design Vision).

• Synopsys' PrimeTime static timing analysis tool provides a single, golden, trusted signoff solution for timing, signal integrity, power and variation-aware analysis. 
• Synopsys' Fusion Compiler is a tool that combines synthesis, place and route (P&R), and signoff technologies on a single RTL-to-GDSII data model.
• Synopsys' Synthesis tool, using Design Vision, is a logic synthesis tool that takes HDL designs and synthesizes them to gate-level HDL netlists.

Synopsys Electronic Design Automation: https://www.synopsys.com/

Tool deployment supported by the Network for Computational Nanotechnology and Purdue University.

Researchers should cite this work as follows:

• Harish Balan, Ali Shamsapour, Jesse Flores, Steven Clark, Juan Carlos Verduzco Gastelum, Alejandro Strachan (2024), "Synopsys digital design," https://nanohub.org/resources/synopsysdigital. (DOI: 10.21981/JB3P-5976).

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