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THM-TFET Compact Model
30 Apr 2022 | Compact Models | Contributor(s):
By Alexander Kloes1, Fabian Horst2, Anita Farokhnejad3, Michael Graef4
1. Technische Hochschule Mittelhessen - University of Applied Sciences 2. Bender GmbH & Co. KG 3. IMEC 4. Infineon Technologies
THM-TFET is a compact model for a double-gate Tunnel-FET, is provided in Verilog-A code and allows for DC, AC and transient circuit simulation.
https://nanohub.org/publications/427/?v=1
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A UCSD analytic TFET model
Downloads | 18 Dec 2015 | Contributor(s):: Jianzhi Wu, Yuan Taur
A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by...
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Course on Beyond CMOS Computing
Teaching Materials | 06 Jun 2013 | Contributor(s):: Dmitri Nikonov
Complementary metal-oxide-semiconductor (CMOS) field effect transistors (FET) underpinned the development of electronics and information technology for the last 30 years. In an amazing saga of development, the semiconductor industry (with a leading role of Intel) has shrunk the size of these...
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Devendra Dhaka
https://nanohub.org/members/69149
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James T. Teherani
James Teherani joined Columbia University as anassistant professor in the Department of Electrical Engineering in 2015. He received his BS in electrical and computer engineering from the University...
https://nanohub.org/members/37606
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SungGeun Kim
SungGeun recieved bachelor's degree from Ajou University in 2001 in electrical engineering and got master's degree at GIST(Gwangju Institute of Science and Technology) in 2005. He studied on the...
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