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A Verilog-A Compact Model for Negative Capacitance FET
05 Apr 2016 | Compact Models |Contributor(s): Muhammad Abdul Wahab, Muhammad A. Alam
The NC-FET compact model is a semi-physical verilog-A model of the negative capacitance transistor. We developed this self-consistent model with BSIM4/MVS and Landau theory. This model is useful to design NC-FET for high speed and low power...
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Too hot to handle? The emerging challenge of reliability/variability in self-heated FintFET, ETSOI, and GAA-FET
11 Jan 2016 | Presentation Materials | Contributor(s): Muhammad A. Alam, Sang Hoon Shin, Muhammad Abdul Wahab, Jiangjiang Gu, Jingyun Zhang, Peide "Peter" Ye
This presentation is part of the 8th IEEE/ACM Workshop on Variability Modeling and Characterization (VMC) 2015. It is difficult to control the geometry, doping, and thicknesses of small transistors. Moreover, nanoscale transistors degrade due to NBTI and HCI at vastly different rates. Fortunately, designers have learned to live with these static and dynamic variabilities and produce extraordinarily fast and power-efficient ICs despite these variations. The job unfortunately is...
MATLAB: Negative Capacitance (NC) FET Model
05 Dec 2015 | Downloads | Contributor(s): Muhammad Abdul Wahab, Muhammad A. Alam
MATLAB model that calculates the Q-V, C-V, and I-V characteristics of the conventional MOSFET and NC-FET.
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