Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.1

By Weijie Xu1, Yudi Zhao1, Haitong Li1, Jinfeng Kang1, Xiaoyan Liu1, Peng Huang1

Peking University

The Peking University RRAM Model is a SPICE-compatible compact model which is designed for simulation of metal-oxide based RRAM devices. It captures typical DC and AC electrical behaviors of the RRAM devices with physics-based model descriptions.

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Version 2.1.1 - published on 18 Jun 2019 doi:10.21981/GG8R-0N73 - cite this

Licensed under NEEDS Modified CMC License according to these terms

Description

The Peking University RRAM Model is a SPICE-compatible compact model which is designed for fast and accurate simulation of metal-oxide based RRAM devices. The model captures typical DC and AC electrical behaviors of metal-oxide based RRAM devices with physics-based compact model descriptions. Parasitic effects are also modeled, including both parasitic resistance of switching layer and electrodes, and parasitic MIM capacitance. Intrinsic variation effects such as statistical distributions of resistance states and switching voltages after SET/RESET processes as well as current fluctuations during RESET are supported.  

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Notes

Minor modification on contributor lists.