Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model

Name: Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model
Published: 2019-06-18
License: NEEDS Modified CMC License

Weijie Xu; Yudi Zhao; Haitong Li; Jinfeng Kang; Xiaoyan Liu; Peng Huang

doi:10.21981/GG8R-0N73

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Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.1

By Weijie Xu¹, Yudi Zhao¹, Haitong Li¹, Jinfeng Kang¹, Xiaoyan Liu¹, Peng Huang¹

Peking University

The Peking University RRAM Model is a SPICE-compatible compact model which is designed for simulation of metal-oxide based RRAM devices. It captures typical DC and AC electrical behaviors of the RRAM devices with physics-based model descriptions.

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Version 2.1.1 - published on 18 Jun 2019 doi:10.21981/GG8R-0N73 - cite this

Licensed under NEEDS Modified CMC License according to these terms

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