Publications: Compact Models

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  1. WHiTe Compact Models

    WHiTe Compact Models

    2022-06-14 18:28:51 | Contributor(s): Neal Graham Wood | doi:10.21981/QTM0-K479

    This package provides a set of 4H SiC (silicon carbide) high-temperature integrated device compact models, written in industry standard Verilog-A; currently included are a resistor and a JFET (junction field-effect transistor).

  2. THM-OTFT Compact Model

    THM-OTFT Compact Model

    2022-06-10 20:23:08 | Contributor(s): Alexander Kloes, Jakob Simon Leise, Jakob Pruefer, Aristeidis Nikolaou, Ghader Darbandy | doi:10.21981/Y7S6-EZ63

    Charge-based compact model for the DC and AC simulation of organic TFTs

  3. THM-TFET Compact Model

    THM-TFET Compact Model

    2022-05-16 23:37:38 | Contributor(s): Alexander Kloes, Fabian Horst, Anita Farokhnejad, Michael Graef | doi:10.21981/NGS2-AE57

    THM-TFET is a compact model for a double-gate Tunnel-FET, is provided in Verilog-A code and allows for DC, AC and transient circuit simulation.

  4. CCAM Compact Carbon Nanotube Field-Effect Transistor Model

    CCAM Compact Carbon Nanotube Field-Effect Transistor Model

    2022-05-16 23:39:34 | Contributor(s): Michael Schroter, Manojkumar Annamalai, Max Haferlach, Martin Claus | doi:10.21981/5E9F-2S90

    CCAM is a semi-physical carbon nanotube field-effect transistor model applicable for digital, analog and high frequency applications.

  5. PSPHV LDMOS

    PSPHV LDMOS

    2021-11-24 14:32:19 | Contributor(s): Colin McAndrew, kejun xia | doi:10.21981/93B1-9539

    This is an update to version 1.0.6 of the PSPHV LDMOS model (an enhanced PSP103.6 model for the core MOS transistor, an updated JFETIDG model for the drift region, JUNCAP2 for the pn-junction diodes, PSP MOS for gate-drain overlap capacitance.

  6. N-MFIS Ferroelectric Tunnel Junction Model

    N-MFIS Ferroelectric Tunnel Junction Model

    2021-09-21 02:15:25 | Contributor(s): Yi Xiao | doi:10.21981/76B4-CK30

    N-MFIS FTJ model is a numerical model which captures the current density versus voltage (J-V) characteristics of the Metal-Ferroelectrics-Interlayer-Semiconductor Ferroelectric Tunnel Junction (MFIS FTJ) with N-type doping.

  7. All-Optical Switching Compact Model

    All-Optical Switching Compact Model

    2021-05-02 01:04:32 | Contributor(s): Johan Pelloux-Prayer, Farshad Moradi | doi:10.21981/XFRW-A070

    This is a VerilogA compact model that represent All-Optical switching event for use of All-Optical Switching layer in an MTJ structure.

  8. cmIPCS: Compact Model of Four-Terminal, Inline, Indirectly Heated, Phase Change RF Switches

    cmIPCS: Compact Model of Four-Terminal, Inline, Indirectly Heated, Phase Change RF Switches

    2021-03-07 15:53:32 | Contributor(s): Nicolas Wainstein, Guy Ankonina, Shahar Kvatinsky, Eilam Yalon | doi:10.21981/VAQ8-4A97

    cmIPCS is a compact model of Four-Terminal, Inline, Indirectly Heated Phase Change RF Switches validated by finite element method simulations and measurements of IPCS devices.

  9. Peking University Analog-Switching Resistive Random Access Memory (RRAM) Verilog-A model

    Peking University Analog-Switching Resistive Random Access Memory (RRAM) Verilog-A model

    2021-02-02 02:43:58 | Contributor(s): Lixia Han, Linlin Cai, Jinfeng Kang, Xiaoyan Liu, Peng Huang | doi:10.21981/MRFT-C373

    The Peking University Analog-switching RRAM physical model can capture the pulse conductance updates of analog RRAM devices rapidly and accurately. The model is described by Verilog-A and can be embedded in SPICE and Cadence for circuit simulations.

  10. Florida Ferroelectric Tunnel Junction Device Model

    Florida Ferroelectric Tunnel Junction Device Model

    2020-10-02 02:40:45 | Contributor(s): Tong Wu, Jing Guo | doi:10.21981/6TFD-GW48

    A compact model of the Ferroelectric Tunnel Junctions (FTJs) device is constructed, using the Wentzel–Kramers–Brillouin (WKB) approximation for tunneling current calculation.

  11. PSPHV LDMOS

    PSPHV LDMOS

    2020-08-16 14:15:33 | Contributor(s): Colin McAndrew, kejun xia | doi:10.21981/H8TZ-RM88

    PSPHV consists of an enhanced PSP103.6 model for the core MOS transistor, an updated JFETIDG model for the drift region, JUNCAP2 for the pn-junction diodes, and two 3-terminal MOS capacitors based on PSP for the gate-drain overlap capacitance.

  12. EPFL HEMT MODEL

    EPFL HEMT MODEL

    2020-05-04 16:05:24 | Contributor(s): Farzan Jazaeri, Jean-Michel Sallese, Majid Shalchian, Matthias Bucher, Nikolaos Makris, Bertrand Parvais | doi:10.21981/PSE5-PP70

    The EPFL HEMT Model is a design-oriented charge-based model for dc operation of AlGaAs/GaAs and AlGaN/GaN-based high-mobility field-effect transistors. The intrinsic model is physics-based and the central concept is based on charge linear approximation.

  13. Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model

    Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model

    2019-06-18 16:16:14 | Contributor(s): Weijie Xu, Yudi Zhao, Haitong Li, Jinfeng Kang, Xiaoyan Liu, Peng Huang | doi:10.21981/GG8R-0N73

    The Peking University RRAM Model is a SPICE-compatible compact model which is designed for simulation of metal-oxide based RRAM devices. It captures typical DC and AC electrical behaviors of the RRAM devices with physics-based model descriptions.

  14. Unimore Resistive Random Access Memory (RRAM) Verilog-A Model

    Unimore Resistive Random Access Memory (RRAM) Verilog-A Model

    2019-06-08 22:48:08 | Contributor(s): Francesco Maria Puglisi, Tommaso Zanotti, Paolo Pavan | doi:10.21981/15GF-KX29

    The Unimore RRAM Verilog-A model is a physics-based compact model of bipolar RRAM which includes cycle-to-cycle variability, thermal effects, self-heating, and multilevel Random Telegraph Noise (RTN).

  15. Stanford 2D Semiconductor (S2DS) Transistor Model

    Stanford 2D Semiconductor (S2DS) Transistor Model

    2018-08-15 02:33:34 | Contributor(s): Saurabh Vinayak Suryavanshi, Eric Pop | doi:10.4231/D39882Q1F

    The Stanford 2D Semiconductor (S2DS) model is a physics-based, compact model for field-effect transistors (FETs) based on two-dimensional (2D) semiconductors such as MoS2.

  16. Stanford 2D Semiconductor Quasi-Ballistic Transistor Compact Model

    Stanford 2D Semiconductor Quasi-Ballistic Transistor Compact Model

    2018-08-15 02:33:04 | Contributor(s): Saurabh Vinayak Suryavanshi, Eric Pop | doi:10.4231/D3F18SH56

    The S2DSb compact model is based on MVS model and captures the quasi-ballistic transport in two-dimensional field effect transistors (2D FETs). It also includes a detailed device self-heating model and temperature effects for sub-10 nm 2D FETs.

  17. SPICE based Compact Model for Electrical Switching of Antiferromagnet

    SPICE based Compact Model for Electrical Switching of Antiferromagnet

    2018-08-15 02:32:36 | Contributor(s): Xe Jin Chan, Jan Kaiser, Pramey Upadhyaya | doi:10.4231/D3V97ZT7C

    Simulates the electrical switching of antiferromagnets with circuit models

  18. Multi-walled/Single-walled Carbon Nanotube (MWCNT/SWCNT) Interconnect Lumped Compact Model Considering Defects, Contact resistance and Doping impact

    Multi-walled/Single-walled Carbon Nanotube (MWCNT/SWCNT) Interconnect Lumped Compact Model Considering Defects, Contact resistance and Doping impact

    2018-07-18 16:10:04 | Contributor(s): Rongmei Chen, Jie LIANG, Jaehyun Lee, Vihar Georgiev, Aida Todri | doi:10.4231/D3183448N

    In this project, we present SWCNT and MWCNT interconnect compact models. These models consider the impact of CNT defects, the chirality and contact resistance between CNT-electrode (Pd) on CNT interconnect performances and power consumption. Variabilities

  19. Compact Model of Dielectric Breakdown in Spin Transfer Torque Magnetic Tunnel Junction

    Compact Model of Dielectric Breakdown in Spin Transfer Torque Magnetic Tunnel Junction

    2018-04-16 17:57:33 | Contributor(s): You Wang, Yue Zhang, Weisheng Zhao, Dafine Ravelosona, Jacques-Olivier Klein, Lirida Naviner, Hao Cai

    Spin Transfer Torque Magnetic Tunnel Junction (STT-MTJ) is a promising candidate for non-volatile memories thanks to its high speed, low power, infinite endurance and easy integration with CMOS circuits.

  20. Compact model for Perpendicular Magnetic Anisotropy Magnetic Tunnel Junction

    Compact model for Perpendicular Magnetic Anisotropy Magnetic Tunnel Junction

    2018-04-16 17:57:57 | Contributor(s): You WANG, Yue ZHANG, Weisheng Zhao, Jacques-Olivier Klein, Dafiné Ravelosona, Hao Cai, Lirida Naviner

    This STT PMA MTJ model integrates the physical models of static, dynamic behaviors and reliability issues, which can be used to perform more accurate and complex reliability analysis of complex hybrid circuits before fabrication.