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Essential Physics of the Ultimate MOSFET and the Next 20 Years of Semiconductor Technology
18 Mar 2024 |
My goal in this talk is to discuss the operation of these devices in a simple but physically sound way. A broader goal of my talk is to discuss how semiconductor technology will meet the insatiable appetite that artificial intelligence has for more computing, more memory, and faster communication.
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SCALE Total Ionizing Dose Response Mechanisms in a 12-nm FinFET Technology
21 Feb 2024 | | Contributor(s):: Hugh Barnaby
This talk was also presented at the 2024 Microelectronics Reliability and Qualification Workshop, The Aerospace Corporation, El Segundo, CA, February, 6, 2024.
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Moore's Law and Radiation Effects on Microelectronics
03 Oct 2023 | | Contributor(s):: Daniel M. Fleetwood
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CMOS+X: Integrated Ferroelectric Devices for Energy Efficient Electronics
09 Dec 2022 | | Contributor(s):: Sayeef Salahuddin
In this talk, I shall briefly present how integrated ferroelectric devices offer a new pathway in this context. First, I shall discuss the phenomenon of negative capacitance in ferroelectric materials. A fundamentally new state in the ferroelectrics, negative capacitance promises to reduce...
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Aditi Singh
https://nanohub.org/members/332967
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IWCN 2021: Computational Research of CMOS Channel Material Benchmarking for Future Technology Nodes: Missions, Learnings, and Remaining Challenges
15 Jul 2021 | | Contributor(s):: raseong kim, Uygar Avci, Ian Alexander Young
In this preentation, we review our journey of doing CMOS channel material benchmarking for future technology nodes. Through the comprehensive computational research for past several years, we have successfully projected the performance of various novel material CMOS based on rigorous physics...
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Tigran David Grigoryan
https://nanohub.org/members/315956
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Zain Mansoor
https://nanohub.org/members/304736
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Gopikrishna V
https://nanohub.org/members/299311
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Shonkho Shuvro
Shonkho Shuvro is currently a Ph.D. scholar at CeNSE, IISc Bangalore. He did his master's in "VLSI Design" from IIEST, Shibpur, India. He is working on GaN devices on heterogeneous integration on...
https://nanohub.org/members/294475
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HIMADRI PANDEY, Ph.D.
https://scholar.google.com/citations?user=dnFxtFAAAAAJ&hl=en
https://nanohub.org/members/292409
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Neilalohith Sharma
https://nanohub.org/members/257041
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Arijit Sengupta
A motivated individual with an aptitude in leading and managing teams for projects and related work. My goal is to become associated with a company or an university where I can utilize my skills to...
https://nanohub.org/members/209943
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Hasantha Malavipathirana
https://nanohub.org/members/206996
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JFETIDG Model for Independent Dual-Gate JFETs
19 Jul 2017 | Compact Models | Contributor(s):
By Colin McAndrew1, Kejun Xia2
1. Freescale Semiconductor 2. NXP Semiconductors
JFETIDG is a compact model for independent dual-gate JFETs. It is also applicable to: resistors with metal shields; the drift region of LDMOS transistors; the collector resistance of vertical...
https://nanohub.org/publications/173/?v=2
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A Phase-Changing Oxide for PS Silicon Photonics
03 Nov 2016 | | Contributor(s):: Richard Haglund
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Advanced CMOS Device Physics for 7 nm and Beyond
16 Dec 2015 | | Contributor(s):: Scott Thompson
This presentation is part of 2015 IEDM tutorials The industry march along Moore's Law continues and new semiconductor nodes at 7 and beyond will certainly happen. However, many device, material, and economical challenges remain. This tutorial will target understanding key device concepts for...
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Emerging CMOS Technology at 5 nm and Beyond: Device Options and Trade-offs
14 Dec 2015 | | Contributor(s):: Mark Lundstrom, Xingshu Sun, Dimitri Antoniadis, Shaloo Rakheja
Device Options and Trade-offs
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Green Light on Germanium
02 Nov 2015 | | Contributor(s):: peide ye
This talk will review recent progress as well as challenges on Ge research for future logic applications with emphasis on the breakthrough work at Purdue University on Ge nFET which leads to the demonstration of the world first Ge CMOS circuits on Si substrates. Ge device technology includes...
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Nour Boukortt, Ph.D.
https://nanohub.org/members/133335