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Tags: MOSFET modeling

All Categories (1-20 of 24)

  1. A Verilog-A Compact Model for Negative Capacitance FET

    28 Nov 2015 | Compact Models | Contributor(s):

    By Muhammad Abdul Wahab1, Muhammad A. Alam1

    Purdue University

    The NC-FET compact model is a semi-physical verilog-A model of the negative capacitance transistor. We developed this self-consistent model with BSIM4/MVS and Landau theory. This model is useful...

    https://nanohub.org/publications/95/?v=1

  2. Gaurav Dhiman

    https://nanohub.org/members/131673

  3. how to simulate insulator in a GNRFET with matlab?

    Closed | Responses: 0

    I want to apply gate voltage on a graphene nanoribbon as a channel in a GNRFET. then I want to solve poisson equation but I need to know the voltage on channel as the boundary...

    https://nanohub.org/answers/question/1583

  4. Stanford Virtual-Source Carbon Nanotube Field-Effect Transistors Model

    08 Apr 2015 | Compact Models | Contributor(s):

    By Chi-Shuen Lee1, H.-S. Philip Wong1

    Stanford University

    The VSCNFET model captures the dimensional scaling properties and includes parasitic resistance, capacitance, and tunneling leakage currents. The model aims for CNFET technology assessment for the...

    https://nanohub.org/publications/42/?v=2

  5. Neel Chatterjee

    https://nanohub.org/members/118363

  6. Hybrid CMOS/SET models for PSpice?

    Closed | Responses: 0

    Hello! Can anyone tell me where can I find models for hybrid transistors (CMOS and Sinlgle Electron) for designing circuits in PSpice? I must find them for my homework. Thank you!

    https://nanohub.org/answers/question/1404

  7. How exactly PN junction works?

    Closed | Responses: 0

    I know the conventional explanation that electrons moves from n- side and holes from p-side etc but i know that holes is nothing but the absence of electron. So i want to know the working of...

    https://nanohub.org/answers/question/1341

  8. Sabbir Ebna Razzaque

    https://nanohub.org/members/67938

  9. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling

    28 Mar 2012 | Courses | Contributor(s): Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has...

    https://nanohub.org/resources/13613

  10. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Fast and Ultra-fast Characterization Methods (Part 1 of 3)

    28 Mar 2012 | Online Presentations | Contributor(s): Souvik Mahapatra

    https://nanohub.org/resources/13614

  11. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Predictive Modeling (Part 3 of 3)

    28 Mar 2012 | Online Presentations | Contributor(s): Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has...

    https://nanohub.org/resources/13612

  12. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: The Impact of Gate Insulator Processes (Part 2 of 3)

    28 Mar 2012 | Online Presentations | Contributor(s): Souvik Mahapatra

    This presentation is part 2 on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it...

    https://nanohub.org/resources/13611

  13. Hasan Munir Nayfeh

    Dr. Hasan M. Nayfeh is a senior engineer at IBM SRDC (East Fishkill, New York). He received his Ph.D. (2003) in Electrical Engineering in the area of strained silicon devices from MIT (Cambridge,...

    https://nanohub.org/members/56927

  14. keerti kumar korlapati

    https://nanohub.org/members/55518

  15. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling (2011)

    11 May 2011 | Online Presentations | Contributor(s): Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability, or in short NBTI, observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10...

    https://nanohub.org/resources/11249

  16. Onkar Shrinivas Bhende

    https://nanohub.org/members/52322

  17. MOSFET Lab - Scaling

    03 Jan 2011 | Teaching Materials | Contributor(s): Saumitra Raj Mehrotra, Gerhard Klimeck, Dragica Vasileska

    The concept of device scaling and the need to control short channel effects is used in this real life problem

    https://nanohub.org/resources/10268

  18. ABACUS: MOSFET - Diffusion Process

    09 Aug 2010 | Teaching Materials | Contributor(s): Dragica Vasileska, Gerhard Klimeck

    The goal of this assignment is to make familiar the students the required doses in the diffusion step of fabrication of semiconductor devices to get certain values of the volume doping densities.

    https://nanohub.org/resources/9484

  19. Threshold voltage in a nanowire MOSFET

    22 Apr 2010 | Animations | Contributor(s): Saumitra Raj Mehrotra, SungGeun Kim, Gerhard Klimeck

    Threshold voltage in a metal oxide semiconductor field-effect transistor (better known as a MOSFET) is usually defined as the gate voltage at which an inversion layer forms at the interface...

    https://nanohub.org/resources/8803

  20. i need detail about nanoscale double gate cmos mosfet

    Closed | Responses: 1

    to model a cmos double gate mosfet, what are the parameters need to be considered

    https://nanohub.org/answers/question/478

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