Models for simulating a magnetic tunnel junction in HSPICE. The usage description is included in the "USAGE" text file included in the archive. The libraries are encrypted and have been tested in HSPICE-G-2012.06, HSPICE-E-2010.12-SP2 and HSPICE-D-2010.03-SP1. The archives are named according to the HSPICE version with which it was tested against. Always run with the archive containing the example to test your simulation environment beforehand.
Georgios Panagopoulos Charles Augustine Sri Harsha Choday Xuanyao Fong
NEEDS Semiconductor Research Corporation C-SPIN center in StarNET, an SRC program by MARCO and DARPA National Science Foundation Intel Corporation
Georgios Panagopoulos, Charles Augustine, Kaushik Roy, "A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach," in Proc. of Design, Automation & Test Europe (DATE) 2012, Mar. 2012, pp. 1443-1446 X. Fong, S. K. Gupta, N. N. Mojumder, S. H. Choday, C. Augustine, and K. Roy, "KNACK: a hybrid spin-charge mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells," in Proc. of 2011 Int. Conf. on Simulation of Semicond. Processes and Dev. (SISPAD), pp. 51-54, Sep 2011, doi:10.1109/SISPAD.2011.6035047
Georgios Panagopoulos, Charles Augustine, Kaushik Roy, "A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach," in Proc. of Design, Automation & Test Europe (DATE) 2012, Mar. 2012, pp. 1443-1446 X. Fong, S. K. Gupta, N. N. Mojumder, S. H. Choday, C. Augustine, and K. Roy, "KNACK: a hybrid spin-charge mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells," in Proc. of 2011 Int. Conf. on Simulation of Semicond. Processes and Dev. (SISPAD), pp. 51-54, Sep 2011, doi:10.1109/SISPAD.2011.6035047
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