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NEEDS Compact Models

NEEDS is charged to advance device science and to connect it with applications.  A central focus is the development of physics-based compact models for novel nanodevices. A suite of compact models that encompass a wide variety of nanodevice physics is being developed.  These models provide examples of how compact models can be grounded in fundamental physics and detailed simulations and validated by experiments. NEEDS models provide the community with a library of high-quality models; they serve as case studies and examples, and they drive the development of the NEEDS tools for developing simulation ready compact models.

NEEDS models are licensed with a version of the Compact Model Council (CMC) standard license and follow the CMC recommendations for versioning. Typical NEEDS model releases include: a Verilog-A model for downloading, a MATLAB version when available, a short manual, representative experimental data, references, supporting educational resources, and a parameter extractor (when available).

In addition to downloading compact models from needs.nanohub.org,

developers are encouraged to publish their own models here.


See Quick Start to get started.

Publish Your Compact Model >> Start Here 

As listed below, compact models for a wide variety of devices are available to download.

Unless otherwise noted, all models are in Verilog-A.
: MATLAB model only
&: Both MATLAB and Verilog-A models are available

Name Created Latest revision From

Stanford 2D Semiconductor Quasi-Ballistic Transistor Compact Model

The S2DSb compact model is based on MVS model and captures the quasi-ballistic transport in two-dimensional field effect transistors (2D FETs). It also includes a detailed device self-heating model and temperature effects for sub-10 nm 2D FETs.
2018-08-14 2018-08-14 Stanford

SPICE based Compact Model for Electrical Switching of Antiferromagnet

Simulates the electrical switching of antiferromagnets with circuit models
2018-08-13 2018-08-13 Purdue

Multi-walled/Single-walled Carbon Nanotube (MWCNT/SWCNT) Interconnect Lumped Compact Model Considering Defects, Contact resistance and Doping impact

These models consider the impact of CNT defects, the chirality and contact resistance between CNT-electrode (Pd) on CNT interconnect performances and power consumption. Variabilities of diameter, defect resistance and chirality are also considered in these models by enabling Monte Carlo simulation. Furthermore, the increase in charge based doping of CNT with PtCl4 is evaluated by Fermi level shift which changes the conducting channel of CNT and then impact the performance, power consumption and variability of CNT interconnect.
2018-07-18 2018-07-18 CNRS; University of Glasgow

The Berkeley Electrostatic Discharge Model

This repository contains a set of behavioural models for ESD protection devices (or ESD clamps). Such devices usually operate based on a mechanism known as snapback, which creates a fold in the device's I--V graph. To incorporate snapback, existing compact models often use if-else statements, Boolean variables, or implement specialised time integration methods inside. These practices greatly reduce the robustness of the models in simulation.
2018-03-06 2018-03-06 UC Berkeley

Berkeley Memristor Model

2018-03-06 2018-03-06 UC Berkeley

CNRS - Carbon Nanotube Interconnect RC Model

This CNT Interconnect Compact Model includes a solid physics understanding and electrical modeling for pristine and doped SWCNT as Interconnect applications. SWCNT resistance and capacitance are modeled in Verilog-A.
2017-11-09 2017-11-09 CNRS

Notre Dame TFET Model

To gain more insights into the benefits of tunnel FETs in low power circuit applications and make performance projections, a universal analytical TFET compact model that captures the essential features of the tunneling process has been developed. The model is valid in all four operating quadrants of the TFET. Based on the Kane-Sze formula for tunneling, the model captures the distinctive features of TFETs such as bias-dependent subthreshold swing, superlinear drain current onset, ambipolar conduction, and negative differential resistance (NDR). To guarantee charge conservation an analytic charge-based capacitance model of the terminal capacitances has also been developed. A bias dependent gate current model with a 100%/0% drain/source current partition is also included. The equation set is broadly applicable across materials systems and TFET geometries and is readily fitted to rigorous physics-based device simulations and experimental results. The model is implemented in Verilog-A and in AIM-Spice that is available on macOS, Windows, Android, Linux and iOS.
2017-09-01 2017-09-01 University of Notre Dame; Norwegian University of Science and Technology

JFETIDG Model for Independent Dual-Gate JFETs

JFETIDG is a compact model for independent dual-gate JFETs. It is also applicable to: resistors with metal shields; the drift region of LDMOS transistors; the collector resistance of vertical bipolar transistors; and junctionless MOS transistors.
2017-04-02 2017-04-02 NXP

MIT TFET compact model including the impacts of non-idealities

a compact model for tunnel FET that for the first time fits experimental transfer and output characteristics including the impact of non-idealities such as trap assisted tunneling and intrinsic band steepness.
2017-05-07 2017-05-07 MIT

MIT Virtual Source Negative Capacitance (MVSNC) model

MIT Virtual Source Negative FET (MVSNC) model is a compact model for negative capacitance transistors that use a FE-oxide in the gate stack to achieve internal voltage amplification and steep subthreshold swing.
2017-03-06 2017-03-06 MIT


A new compact model for SiC power MOSFETs has been presented. The model features an accurate description of the MOS channel, drift region, nonlinear capacitances, and the internal charges.
2017-02-23 2017-02-23 University of Arkansas Fayetteville

Optical Ring Modulator ModSpec Compact Model

The optical ring modulator presented here is a vertical junction resonant microring/disk modulator which can achieve high modulation speed, lower power consumption and compact size. A Matlab-based ModSpec compact model is developed and simulated in this project.
2016-09-19 2016-09-19 MIT

nMOSFET RF and noise model on standard 45nm SOI technology

A compact scalable model suitable for predicting high frequency noise and nonlinear behavior of N-type Metal Oxide Semiconductor (NMOS) transistors is presented.
2016-11-08 2016-11-08 Purdue University

Compact Model of Dielectric Breakdown in Spin Transfer Torque Magnetic Tunnel Junction

Spin Transfer Torque Magnetic Tunnel Junction (STT-MTJ) is a promising candidate for non-volatile memories thanks to its high speed, low power, infinite endurance and easy integration with CMOS circuits. This models includes the mechanism of time dependent dielectric breakdown (TDDB) in oxide barrier and the simulation results show great consistency with the experimental measurements.
2016-08-16 2016-08-16 TELECOM ParisTech

Flexible Transition Metal Dichalcogenide Field-Effect Transistor (TMDFET) Model

Verilog-A model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs), considering effects when scaling the transistor size down to the 16-nm technology node. This model can be used for circuit-level simulations.
2016-05-03 2016-05-03 Babol University of Technology

Physics-Based Compact Model for Dual-Gate Bilayer Graphene FETs

An accurate compact model based on physical mechanisms for dual-gate bilayer graphene FETs is presented. This model is developed based on the 2-D density of states of bilayer graphene and is implemented in Verilog-A. Furthermore, physical equations describing the behavior of the source and drain access regions under back-gate bias are proposed. The accuracy of the developed large-signal compact model has been verified by comparison with measurement data from the literature.
2016-04-07 2016-04-07 University of Bordeaux

Double-Clamped Silicon NEMS Resonators Model

This model is built for a silicon-based, double-clamped (source and drain), double-gate beam. The model takes into account capacitive modulation with the two gates, piezoresistive modulation through the beam and electrical parasitic elements.
2016-03-07 2016-03-07 Purdue University

Unreleased 1D CMOS Resonant Body Transistor with MIT Virtual Source (URBT-MVS) Model

An RBT is a micro-electromechanical (MEM) resonator with a transistor (FET) incorporated into the resonator structure to sense the mechanical vibrations. This is a fully-featured spice-compatible compact model for fast analysis of RBTs.
2016-03-31 2016-03-31 MIT

A UCSD analytic TFET model 

A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by numerical simulations, the model is able to generateIds-Vgs characteristics for any given staggered bandgap and channel length. Ids-Vds characteristics are also generated by building into the model the de-biasing effect of channel charge in the linear region. It is predictive in the sense that there are no ad hoc fitting parameters.

2015-12-18 2015-12-18 University of California, San Diego

Compact model for Perpendicular Magnetic Anisotropy Magnetic Tunnel Junction

This STT PMA MTJ model integrates the physical models of static, dynamic behaviors and reliability issues, which can be used to perform more accurate and complex reliability analysis of complex hybrid circuits before fabrication.

2015-11-09 2015-11-09 Institut Mines-Téléecom, et. al.

Negative Capacitance (NC) FET Model 

MATLAB model that calculates the Q-V, C-V, and I-V characteristics of the conventional MOSFET and NC-FET. Gate-source and gate-drain overlap and fringing capacitances and flat-band potential are considered in the model. Corresponding input parameters: r_C=C_ov/C_ox and flat-band potential (Vfb). Coefficients of different ferroelectric dielectrics are provided. There is a provision to include multi-layers gate NC dielectric stack.

2015-11-05 2015-11-05 Purdue University

A Verilog-A Compact Model for Negative Capacitance FET

The NC-FET compact model is a semi-physical verilog-A model of the negative capacitance transistor. In the model, NC dielectric is integrated as gate dielectric stack with conventional MOSFET . The NC dielectric is explained by Landau theory and the conventional MOSFET is represented by available models of MOSFET such as MVS and BSIM4. The two elements work self-consistently to provide the characteristics of NC-FET. The model works for both short and long channel transistors. Using the NC-FET model in HSPICE, performance of the complex circuits can be evaluated. The model can be adapted to include multiple layers of NC-dielectric stack and new conventional MOSFET model with necessary modifications. This model is useful to design and optimize the performance of NC-FET with a goal for high speed and low power applications.
2015-11-29 2016-04-05 Purdue University


Compact model for polysilicon (poly) resistors, 3-terminal JFETs, and diffused resistors.
2014-11-21 2014-11-21 Freescale

UCSB Graphene Nanoribbon Interconnect Compact Model

UCSB GNR interconnect model is based on a distributed RLC circuit, in which carrier mean free path, graphene doping concentration (Fermi level) and number of layers are considered. The model was originally published by UCSB NRL group.
2015-4-21 2015-4-21 UCSB

Modular Spintronics Library

There has been enormous progress in the last two decades, effectively combining spintronics and magnetics into a powerful force that is shaping the field of memory devices, but the impact on logic devices remains uncertain. New materials and phenomena continue to be discovered at an impressive rate and it presents a formidable challenge to integrate new discoveries into composite structures that can be analyzed and evaluated. To meet this challenge, we have created a library of elemental modules each of which represents a specific physical phenomenon, and can be used to build spin-circuit models for more complex devices and structures.
2013-5-9 2013-5-9 Purdue

MVS Nanotransistor Models &

The MIT Virtual Source (MVS) models accurately describe the transport physics of quasi-ballistic transistors with only a few physical parameters. MVS-1, for which there is a Si and III-V HEMT version is a semi-empirical model that includes a few key physical parameters and a couple of empirical parameters. MVS-2 reduces the empiricism in MVS-1 to achieve a predictive carrier transport model for both Si and III-V FETs. The basic MVS core is also used in a number of other transistor models available on the NEEDS site.
2014-10-23 2015-8-1 MIT

MIT Virtual Source GaNFET-RF ( MVSG-RF) Model

The MVS-G-RF GaN HEMT model is a self-consistent transport/capacitance model for scaled GaN HEMT devices used in RF applications.
2014-10-22 2014-10-22 MIT

Purdue Nanoelectronics Research Laboratory Magnetic Tunnel Junction Model

This is the Verilog-A model of the magnetic tunnel junction developed by the Nanoelectronics Research Laboratory at Purdue University.
2014-10-23 2014-10-23 Purdue

Released Resonant Body Transistor (RBT) Model

An RBT is a micro-electromechanical (MEM) resonator with a transistor (FET) incorporated into the resonator structure to sense the mechanical vibrations. The model is aimed to present a deep insight into the physics of the RBT.
2014-10-22 2014-10-22 MIT

Stanford 2D Semiconductor (S2DS) Transistor Model

The Stanford 2D Semiconductor (S2DS) model is a physics-based, compact model for field-effect transistors (FETs) based on two-dimensional (2D) semiconductors such as MoS2. Version 1.0.0 represents the initial release. The model relies on the drift-diffusion approach, including quantum capacitance, simple band structure, velocity saturation, contact resistance and self-heating effects that are specific to 2D materials. The model has been developed for double-gate devices and employs approximations to simplify integrals and enable compact modeling of 2D-FETs. Caution should be taken while using the model for circuit simulation. This is the first attempt to develop a model for 2D semiconductors based on physics and experimental data with a minimum of fitting parameters. Future updates to the model are planned to make it more robust and accurate. As of now the model is stable for DC and limited AC simulations. For reference, please examine the sample circuit bench provided.
2014-10-22 2016-04-04 Stanford

Stanford University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model

The Stanford University RRAM Model is a SPICE-compatible compact model which describes switching performance for bipolar metal oxide RRAM.
2014-10-23 2014-10-23 Stanford

TAG Solar Cell Model (p-i-n thin film)

The TAG solar cell model is a physics-based compact model for p-i-n thin film solar cells that can be used for panel level simulations.
2014-10-23 2014-10-23 Purdue

Spin Switch Model

We present a circuit/compact model for the Spin Switch created using a Verilog-A based library of "spintronic lego blocks" building upon previous works on spin transport.
2014-10-23 2014-10-23 Purdue

mCell Model

This model is a hybrid physics/empirical compact model that describes digital switching behavior of an mCell logic devices, where a write current moves a domain wall to switch the resistance of a magnetic tunnel junction between stable states.
2014-10-22 2015-1-19 Carnegie Mellon

Universal TFET model

A universal TFET compact model implemented in verilog-A
2015-1-23 2015-1-23 University of Notre Dame, Norwegian University of Science and Technology

UCSB 2D Transition-Metal-Dichalcogenide (TMD) FET model

compact model for 2D TMD FET considering the effect of mobility degradation, interface traps, and insufficient doping in the source/drain extension regions
2015-3-25 2015-3-25 UCSB

Stanford Virtual-Source Carbon Nanotube Field-Effect Transistors Model

The VSCNFET model captures the dimensional scaling properties and includes parasitic resistance, capacitance, and tunneling leakage currents. The model aims for CNFET technology assessment for the sub-10-nm technology nodes.
2015-3-30 2015-4-8 Stanford

III-V Tunnel FET Model

The III-V Tunnel FET Model is a look-up table based model, where the device current and capacitance characteristics are obtained from calibrated TCAD Sentaurus simulation.
2014-10-22 2015-4-20 Penn State University

Berkeley VCSEL Compact Model

The U.C. Berkeley Vertical Cavity Surface Emitting Laser (VCSEL) Compact Model provides a circuit simulator compatible Verilog-A model of VCSEL lasers, primarily for use in designing direct-modulation driver circuits for optical interconnects.
2015-5-28 2015-5-28 UC Berkeley

FET pH Sensor Model

The FET pH sensor model is a surface potential compact model for FET based pH sensors that accurately describes the physics of electrolyte and surface charges that respond to pH.
2014-11-3 2014-11-3 Purdue

Verilog-A implementation of the compact model for organic thin-film transistors oTFT

Compact model oTFT supports mobility bias enhancement, contact effects, channel modulation and leakage in organic thin-film transistors. Version 2.04.01 “mirrors” TFT in all regimes of operation by DC, AC and transient simulations.
2015-6-14 2015-6-14 McMaster University

Ambipolar Virtual Source Compact Model for Graphene FETs

This is a compact physics-based ambipolar-virtual-source (AVS) model that describes carrier transport in both unipolar and ambipolar regimes in quasi-ballistic graphene field-effect transistors (GFETs).
2014-10-22 2014-10-22 MIT

Released Resonant Body Transistor with MIT Virtual Source (RBT-MVS) Model

An RBT is a micro-electromechanical (MEM) resonator with a transistor (FET) incorporated into the resonator structure to sense the mechanical vibrations. This is a fully-featured spice-compatible compact model for fast analysis of RBTs.
2015-8-30 2015-8-30 MIT

MIT Virtual Source GaN HEMT-High Voltage (MVSG-HV) compact model

MIT Virtual Source GaN HEMT-High Voltage (MVSG-HV) model is a charge based physical model for HV-GaN HEMTs suitable for power switching applications.
2015-8-29 2015-8-29 MIT

Thermoelectric Device Compact Model

The NEEDS thermoelectric compact model describes a homogeneous segment of thermoelectric material and serves as a basic building block for complex electrothermal system.
2015-9-1 2015-9-1 Purdue

Optical Ring Filter (ORF) Modspec Compact Model

The MIT ORF Modspec Compact Model provides a compact model of an optical ring filter on Model and Algorithm Prototyping Platform. It describes transmission behavior of the filter when operating with several hundreds terahertz light signals.
2015-9-21 2015-9-21 MIT

Non-Faradaic Impedance-based Biosensor Model

The non-Faradaic impedance model is a physics-based compact model that describes the small-signal operation of a sensor that relies on electrochemical detection of analyte molecules.
2015-9-25 2015-9-25 Purdue

CCAM Compact Carbon Nanotube Field-Effect Transistor Model

CCAM is a semi-physical carbon nanotube field-effect transistor model applicable for digital, analog and high frequency applications.
2015-6-15 2015-10-6 Technische Universitat Dresden, UCSD