III-V Nanoscale MOSFETS: Physics, Modeling, and Design
Papers | 28 Jun 2013 | Contributor(s): Yang Liu
As predicted by the International Roadmap for Semiconductors (ITRS), power consumption has been the bottleneck for future silicon CMOS technology scaling. To circumvent this limit, researchers are investigating alternative structures and materials, among which III-V compound semiconductor-based...
NanoMOS
Tools | 19 May 2006 | Contributor(s): , Sebastien Goasguen, Akira Matsudaira, Shaikh S. Ahmed, Kurtis Cantley, Yang Liu, Yunfei Gao, Xufeng Wang, Mark Lundstrom
2-D simulator for thin body (less than 5 nm), fully depleted, double-gated n-MOSFETs
FETToy
Tools | 14 Feb 2006 | Contributor(s): Anisur Rahman, Jing Wang, Jing Guo, Md. Sayed Hasan, Yang Liu, Akira Matsudaira, Shaikh S. Ahmed, Supriyo Datta, Mark Lundstrom
Calculate the ballistic I-V characteristics for conventional MOSFETs, Nanowire MOSFETs and Carbon NanoTube MOSFETs
Prophet
Tools | 15 May 2005 | Contributor(s): Connor S. Rafferty, kent smith, Yang Liu, Derrick Kearney, Steven Clark
Framework for solving systems of partial differential equations (PDEs) in time and 1, 2, or 3 space dimensions
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